help regarding initialization of pll of lpc2129

Hi,
if you want use the external clock, and not pll, you must simply jump the pll enable.
The external clock is used at startup and even the pll is activated and stable; but if you don't want use pll, simply don't start it.

If is it not the answer that you wait, you must better explain your question.

Regards
Maurizio

Hi,
if you want use the external clock, and not pll, you must simply jump the pll enable.
The external clock is used at startup and even the pll is activated and stable; but if you don't want use pll, simply don't start it.

If is it not the answer that you wait, you must better explain your question.

Regards
Maurizio

Nothing says that you have to wait for the PLL to lock after having configured the PLL. You just have to make sure that the PLL has a stable frequency before you switch oscillator source.

So - turn on the PLL and then continue with your program.

At a later section in the program, check if the PLL has stabilized, and then start using it.

It is, of curse, up to you to check how your program is affected by where/when you finally switch to the different frequency.

alternatively a interrupt can be generated when the PLL locks, so that you can carry out other tasks while the PLL starts . once the PLL has locked as a stable clock source , it can replace the external clock source for Cclk.
this is given in the hitex book for lpc2129 as an alternative way for starting the pll.

also see datasheet for lpc2129 software interrupt register pin no. 12 i.e. for the same purpose

alternatively a interrupt can be generated when the PLL locks, so that you can carry out other tasks while the PLL starts . once the PLL has locked as a stable clock source , it can replace the external clock source for Cclk.
this is given in the hitex book for lpc2129 as an alternative way for starting the pll.

also see datasheet for lpc2129 software interrupt register pin no. 12 i.e. for the same purpose

Only note about use of interrupt for PLL lock is of course that the interrupt comes at a random position in the program execution. Having the switch take place at a known location in the program often has its advantages.

Still i want to be get cleared about the INTERRUPT for PLL connect concept.
Will u plz explain it to me...!
With refeerence to the code.

It works as the manual says it does. You can perform the first part of PLL activation and have the processor generate an interrupt when the PLL has locked. When you get the interrupt, you can perform the second part.

This allows you to insert own code to do a lot of other things instead of having a while loop busy-waiting for the PLL lock.

The manual for the chip specifically mentions that the PLOCK bit of the PLLSTAT register is connected to the interrupt controller and says:
"This allows for software to turn on the PLL and continue with other functions without having to wait for the PLL to achieve lock. When the interrupt occurs (PLOCK = 1), the PLL may be connected, and the interrupt disabled."

Actual configuration/handling of interrupts is similar to other interrupt sources in the chip.

can u please give me a sample code for the same
plz.......

I knew you would ask that. You just do not want to do any work yourself. Yes I can. But where do I send the bill?

Saurabh.Tiwari@kpitcummins.com

What there any part of this thread you did understand?

Things such as - what happens if you have a watchdog timer or UART configured and changes the processor frequency in the interrupt handler?