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FIQ intterupt Function

I want to write function for fiq interrupt on LPC2378,
Here the program which I have try to run. But it gives error.

void T0isr(void) __fiq //__irq
{

T0IR = 1; /* clear interrupt flag */

T0TCR = 0;

Enable_Timer1();

T0TCR = 1;

VICVectAddr=0xff;
}

void Timer0_Init(int interval)
{ /*Load prescaler for 1mSec*/

T0PR=PRESCALER; /** * T0TCR: Timer 0 Control Register * 2: reset counters (both timer and prescaler) **/

T0TCR=2; /* * interrupt and clear when counter=match */

T0MCR=3; /* * interrupt every ms */

T0MR0=interval;

/** * T0TCR: Timer 0 Control Register * 1: enable counting **/

T0TCR=1;

// VICVectAddr4= (unsigned)T0isr; // Set the timer ISR address
// VICVectCntl4= 0x00000020 | 4;

VICIntSelect = 0x00000010; VICIntEnable= 0x00000010;
}

this program give error

freq.c(184): error: #130: expected a "{"

This program is running for irq but not for fiq.......
If anyone know the method of writing a fiq ...
please reply to me

Parents Reply Children
  • ......why do you use so many dots......why do you need to define the FIQ at a specific address......do you know what you are doing......probably not......

  • Are you showing your good manners? If you have not solution then don't reply me. This is Discussion Forum for technical Discussion, not for just time pass.any one can keep small problems on this board. your language is very bad & keep it is in your pocket.

  • Look buddy, I don't mind helping you - but you need to state in clear language what the problem/question is, yes? And drop the dots.

  • Technical discussions don't need ....... in them. And technically speaking, you have one or three puncutation characters. "..." "." "??!", "???", etc.

    Anyway - you register a FIQ handler in exactly the same way that you register an IRQ handler. You don't play with any absolute address. You assign the function pointer of the handler to the correct register in the interrupt controller.

    Note that the interrupt controller has configuration to specify a priority for each interrupt channel - and it also have configuration to specify if using IRQ or FIQ.

    This is covered in the datasheet/user manual for the processor. Just playing around with all the dialog boxes in the Keil simulator should also give you a good idea about exactly what settings the processor supports - for each of these settings, you could consider:
    - not needed because not used
    - default value is good
    - need to assign own value

    Above three choices should be applied for everything configurable in the processor.

  • Hello Ani --,

    The address of the FIQ_Handler does not matter. But you need to store the FIQ_Handler address at the correct vector location. In the Keil examples this is done in the startup file LPC2300.s. Please see example below:

    Vectors         LDR     PC, Reset_Addr
                    LDR     PC, Undef_Addr
                    LDR     PC, SWI_Addr
                    LDR     PC, PAbt_Addr
                    LDR     PC, DAbt_Addr
                    NOP                            ; Reserved Vector
    ;               LDR     PC, IRQ_Addr
                    LDR     PC, [PC, #-0x0120]     ; Vector from VicVectAddr
                    LDR     PC, FIQ_Addr
    
    Reset_Addr      DCD     Reset_Handler
    Undef_Addr      DCD     Undef_Handler
    SWI_Addr        DCD     SWI_Handler
    PAbt_Addr       DCD     PAbt_Handler
    DAbt_Addr       DCD     DAbt_Handler
                    DCD     0                  ; Reserved Address
    IRQ_Addr        DCD     IRQ_Handler
    FIQ_Addr        DCD     FIQ_Handler
    
    
                            IMPORT  FIQ_Handler
    
    Undef_Handler   B       Undef_Handler
    SWI_Handler     B       SWI_Handler
    PAbt_Handler    B       PAbt_Handler
    DAbt_Handler    B       DAbt_Handler
    IRQ_Handler     B       IRQ_Handler
    ;FIQ_Handler    B       FIQ_Handler        ; see Handler code
    

    Please read also Chapter 6: LPC23XX Vectored Interrupt Controller (VIC) in user manual.

    There is written:
    If more than one request is assigned to FIQ, the VIC ORs the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is chieved when only one request is classified as FIQ, because then the FIQ service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt.

    Best Regards, Martin Guenther