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see below: the program encounter an undefined instruction error when execute the blx instruction.
[0xb510] push {r4,r14} [0xb09c] sub r13,#0x70 [0xa803] add r0,r13,#0xc [0x2264] mov r2,#0x64 [0x4911] ldr r1,0x0000d4c8 ; = #0x0000d4e8 [0xe8e8f000] blx 0xd658 ; (Image$$ZI$$Limit + 0x8b4) [0x4c10] ldr r4,0x0000d4cc ; = #0x0000d54c [0x2002] mov r0,#2 [0x6861] ldr r1,[r4,#4] [0xeff0f7ff] blx 0xd470 ; (Image$$ZI$$Limit + 0x6cc) [0x1c02] mov r2,r0
I checked the format of blx instruction, it seems the instruction is valid. I have no idea why it throws the " undefined instruction".
If I'm not mistaken, the BLX instruction was introduced in ARMv5. So if you are using the popular ARM7TDMI (which is ARMv4) you won't have this instruction.
thanks for your reply. we use arm7TDMI MCU actually, but it's weird there are many blx instructions in our platform. ~
(I don't know how to code in Assembly.)
I found a link here:
http://www.keil.com/support/man/docs/armasm/armasm_cjafgdih.htm
Table 4.1. Location of instructions
BLX is available for Arch.T
Arch.T is ARMv4T, ARMv5T*, ARMv6*, and ARMv7 architectures.
BLX is available for Arch.T Arch.T is ARMv4T, ARMv5T*, ARMv6*, and ARMv7 architectures.
Interesting. The Arm Architecture Reference Manual says that BLX is available in ARM version 5 and above.
Hi Mike,
I think You are Right.
I checked several documents, all of them say that "the BLX instruction was introduced in ARMv5".
And the most obvious thing is that: in the link I mentioned, when I further click the "B, BL, BX, BLX, and BXJ" hyperlink, I get another page in the same document saying totally different thing.
http://www.keil.com/support/man/docs/armasm/armasm_cihfddaf.htm
This time it says: Instruction availability and branch ranges
Table 4.7 shows the instructions that are available in ARM and Thumb state.
BLX label +-32MB (5) +-4MB (5T) +-16MB (All T2 except ARMv7-M)
BLX Rm Available (5) Available (5T) Use 16-bit (All T2)
BLX{cond} Rm Available (5) - - -