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Watchdog reset Philips 89v51RD2

Hello All!
I want to reset 89v51RD2 in less than 1 ms
after external Interrupt.

i wrote this code

void external(void) interrupt 0   // External INT0 ISR
{

EA = 0;       // interrupt disable
WDRE=1;
SWDT=1;
while(1);  // wait till reset

}


but it didn't worked.
Please help

According to Datasheet:


To protect the system against software deadlock, the user software must refresh the
WDT within a user-defined time period. If the software fails to do this periodical
refresh, an internal hardware reset will be initiated if enabled (WDRE = 1). The
software can be designed such that the WDT times out if the program does not work
properly.

The WDT in the device uses the system clock (XTAL1) as its time base. So strictly
speaking, it is a Watchdog counter rather than a Watchdog timer. The WDT register
will increment every 344,064 crystal clocks. The upper 8-bits of the time base register
(WDTD) are used as the reload register of the WDT.
The WDTS flag bit is set by WDT overflow and is not changed by WDT reset. User
software can clear WDTS by writing ‘1' to it.

Two SFRs (WDTC and WDTD)control Watchdog timer operation. During idle mode, WDT operation is temporarily
suspended, and resumes upon an interrupt exit from idle.
The time-out period of the WDT is calculated as follows:

Period = (255 - WDTD) 344064 1/fCLK (XTAL1)

where WDTD is the value loaded into the WDTD register and fosc is the oscillator
frequency

WDTC - Watchdog control register (address COH) bit allocation
Bit addressable; Reset value: 00H
Table:
Bit 7 6 5 4 3 2 1 0
Symbol - - - WDOUT WDRE WDTS WDT SWDT

Table: WDTC - Watchdog control register (address COH) bit description
Symbol > Description

WDOUT > Watchdog output enable. When this bit and WDRE are both set, a Watchdog reset will drive the reset pin active for 32 clocks.
WDRE > Watchdog timer reset enable. When set enables a Watchdog timerreset.

WDTS > Watchdog timer reset flag, when set indicates that a WDT reset occurred. Reset in software.
WDT > Watchdog timer refresh. Set by software to force a WDT reset.

SWDT > Start Watchdog timer, when set starts the WDT. When cleared,stops the WDT

Advance Thanks!

Parents
  • I Can not use Reset Pin

    Then maybe you ought to find someone who can.

    Actually Watchdog reset doesn't cause problems with motor.

    How do you know that, given that, by your own words, your watchdog reset "doesn't work" (whatever that means)? And what "problems with motor" are you talking about, anyway?

    Please help please

    How? You're making it completely impossible to help you. You didn't even try to answer of the question I asked you. None of the things you've said so made sense, ripped out of whatever they context they might have been in.

Reply
  • I Can not use Reset Pin

    Then maybe you ought to find someone who can.

    Actually Watchdog reset doesn't cause problems with motor.

    How do you know that, given that, by your own words, your watchdog reset "doesn't work" (whatever that means)? And what "problems with motor" are you talking about, anyway?

    Please help please

    How? You're making it completely impossible to help you. You didn't even try to answer of the question I asked you. None of the things you've said so made sense, ripped out of whatever they context they might have been in.

Children
  • If the processor is generating the timing for a stepper motor, then a watchdog reset will - just as other reset sources - affect the driving.

    A watchdog may be used to generate an interrupt or to reset the processor. If you have a hw lockup somewhere, then the use of the watchdog as an interrupt will most probably not sovle your problem. If you use the watchdog to reset the processor, then the main difference from using the reset pin is that most processors has a status register to inform about which reset reason there where (power-on, brown-out, reset line, watchdog reset, ...). But a processor reset from any source will normally affect all peripherials, such as the sequencer output of the motor drive signals.

    Some processors allows the watchdog to first generate an interrupt, and then after yet more time perform a full reset. Then the interrupt handler may possibly perform some "clean-up" actions before the full reset happens.