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Hi,
I need some help from you to boot from an external NOr flash device (together with the AT91SAM9263 controller from Atmel). I've tried to use the default setup file provided by Keil (SAM9263.s), but it doesn't work so far.
If I use the setup file from Keil - executing the code from the internal SRAM or the external SDRAM - everything is working.
I think that there's a timing problem in the original setup file if you try to boot from an external flash device. Therefore I want to configurate the SMC registers first and then enable the PLL. But at the moment, the processor crashed if I try to store the SMC registers - I don't know why....
There's the important part of the new setup file - the beginning and the end which are not visible, are both the same as in the original setup file from Keil.
; Reset Handler EXPORT Reset_Handler Reset_Handler ; Watchdog Timer Setup --------------------------------------------------------- IF WDT_Val != 0 LDR R0, =WDT_BASE ; Disable Watchdog LDR R1, =WDT_Val STR R1, [R0, #WDT_MR_OFS] ENDIF ; Setup Power Management Controller (PMC) -------------------------------------- IF :DEF:NO_PMC_INIT ELSE IF PMC_SETUP != 0 LDR R0, =PMC_BASE ; System Clock Enable LDR R1, =PMC_SCER_Val STR R1, [R0, #PMC_SCER_OFS] ; Peripheral Clock Enable LDR R1, =PMC_PCER_Val STR R1, [R0, #PMC_PCER_OFS] ; Setup Main Oscillator IF (CKGR_MOR_Val:AND:PMC_MOSCEN) != 0 LDR R1, =CKGR_MOR_Val STR R1, [R0, #CKGR_MOR_OFS] ; Wait until Main Oscillator is stabilized MOSCS_Loop LDR R2, [R0, #PMC_SR_OFS] ANDS R2, R2, #PMC_MOSCS BEQ MOSCS_Loop ENDIF ; Setup the PLL A IF (CKGR_PLLAR_Val:AND:PMC_MUL) != 0 LDR R1, =CKGR_PLLAR_Val STR R1, [R0, #CKGR_PLLAR_OFS] ; Wait until PLL A is stabilized PLLA_Loop LDR R2, [R0, #PMC_SR_OFS] ANDS R2, R2, #PMC_LOCKA BEQ PLLA_Loop ENDIF ENDIF ENDIF ; Setup External Bus Interface (EBI) ------------------------------------------- IF EBI0_SETUP != 0 LDR R0, =MATRIX_BASE LDR R1, =EBI0_CSA_Val STR R1, [R0, #EBI0_CSA_OFS] ENDIF ; of IF EBI0_SETUP != 0 ; Setup Static Memory Controller (SMC) ----------------------------------------- ; Setup Static Memory Controller if enabled IF SMC_SETUP != 0 LDR R0, =SMC_BASE ; Macro for setting the Static Memory Controller MACRO $label SMC_Cod $cs $label LDR R1, =SMC_SETUP$cs._Val STR R1, [R0, #SMC_SETUP$cs._OFS] LDR R1, =SMC_PULSE$cs._Val STR R1, [R0, #SMC_PULSE$cs._OFS] LDR R1, =SMC_CYCLE$cs._Val STR R1, [R0, #SMC_CYCLE$cs._OFS] LDR R1, =SMC_MODE$cs._Val STR R1, [R0, #SMC_MODE$cs._OFS] MEND IF SMC_CS0_SETUP != 0 ; Setup SMC for CS0 if required ;SMC_0 SMC_Cod 0 ; LDR R1, =SMC_SETUP0_Val LDR R1, =0x02020202 ; STR R1, [R0, #SMC_SETUP0_OFS] STR R1, [R0]; {, #SMC_SETUP0_OFS} ; processor crashed at this point ;op{type}T{cond} Rt, [Rn] {, #offset} ; LDR R1, =SMC_PULSE0_Val ; STR R1, [R0, #SMC_PULSE0_OFS] ; LDR R1, =SMC_CYCLE0_Val ; STR R1, [R0, #SMC_CYCLE0_OFS] ; LDR R1, =SMC_MODE0_Val ; STR R1, [R0, #SMC_MODE0_OFS] ENDIF ENDIF ; of IF SMC_SETUP != 0 ; Setup Stack for each mode ---------------------------------------------------- LDR R0, =Stack_Top
I'm not sure if there must be additional configurations before setting up the SMC registers...
best regards Howard
What do you base that thought on? I.e. what did you actually observe going wrong?
I want to boot from the nor flash. First of all, I have to configurate the SMC registers for the right access if the processor is running at 100 MHz.. At the startup the processor is running at 32kHz - therefore there's no problem to access the nor flash device....
If I use the standard keil startup file, the processor is not able to reach the main function....
Therefore I want to configurate the SMC registers first and then enable the PLL.
Then why is does the code you show do it the other way round?
I only configurate the PLL - but I don't set the PLL as active. That means, the processor is running at 32kHz, when I try to configurate the SMC registers - and after that step I will set the PLL and the processor clock.