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Dynamic code swapping from flash into code RAM

I want to design my code space as two halves, one part is 48KB which is resident in RAM and the other part 16KB is dynamically swappable based on the operations 8051 is required to perform. How should I organize and build my code?

1.) I am guessing I will need to design my own dynamic code page loader. I have an indirect ability to write to code space RAM structure using an external h/w piece.

2.) The problem for me is how should I organize my code and build it in this case since, I can have several pages of swappable code? Should I build each of these swappable 16KB code as absolute-segment libraries and assign them the upper 16KB address space? How about the data segments for these swappable code? Do I need to limit the range there as well?

Any insight will be helpful. Thanks.

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  • Thanks for those links Andy.

    Thats a good suggestion. We are indeed aware of differences between DATA space and XDATA space and how the resulting code is different for those accesses. However, our system requires lots (many KBs) of data memory and many many KBs of program memory. We do use some of the DATA memory, though, not all, as we reserve some for future perf. sensitive operations. Even if I use all of the currently unused DATA space, I doubt if it can reduce so much of code space that we do not need banking at all for our system.

    I will go over the optimized code doc to see what we have missed. Even if we cannot get rid of the banking requirement, it would be good to further lower the footprint. Doing more with less... thats the motto!

  • The thing here is that arrays and other large structures are better moved to XDATA, while you try to make optimum use of bits, chars and int variables in DATA. The important thing is to get as many code lines as possibly that perform memory accesses to use as small addressing modes as possible.

  • By moving a few carefully-chosen, much-used variables from XDATA to DATA I once saved several KBytes of code from 16K or so program - so there can be quite significant savings to be had.

    You say you're on v3 - so you must, surely, have seen this coming?

  • No, one fine day, we suddenly realised we were out of code space. :-)

    Of course, we knew. We went through several rounds of code crunching using efficient memory types/memory specific pointers among other things. When we thought there were no further gains to be had, we started obsoleting features. Then, we started getting good-sized code requests for new features and that is when we had to switch to banked code space. We have been in production with that for one generation.

    The issue NOW is we want to see if we can keep the banking design but, get rid of some physical RAM storage. Sounds crazy... I know. Hence, I am here to see if anybody has attempted that.

  • No, one fine day, we suddenly realised we were out of code space. :-)

    I don't want to rub it in, but the upcoming generation of Cortex processors is going to have to up 1 MB internal flash space...! Our LPC2478 has 512KB, and even so, I had to increase the size of the application on my flavor of the product on the expense of a low level firmware layer (we have 3 components in each controller - bootloader, a firmware layer and an application) to accommodate extra functionality. I have seen at least one project so far that failed due to internal flash running out at a too advanced stage.

  • The issue NOW is we want to see if we can keep the banking design but, get rid of some physical RAM storage.
    why not get rid of it all
    CODE banking (all in ROM) allow you more codespace then any '51 project should ever be needing.

    Erik