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Hallo
Im trying to get the USB Host on the LPC2478 to work. Im using the USBHOst lite sample from NXP.
I cant get the USB Host clock started.
Im setting the bit in USBClkCtrl register to start the clock. Then I poll the USBClkSt to see if the clock starts. It never does.
I have verified that the USB clock is at 48 MHz (Verified with the Peripheral->Clocking and Power control->Clock dividers.) The CPU clk is 72 MHz (Above the required 18 MHz for correct USB function). PCONP is set to enable the USB.
I have read the UM several time recarding the USB in the LPC2478.
Could it be any external HW thing? (Some signal missing to switch to USB Host mode?) Schouldnt the USB clock start any way?
/Thomas
Hello Thomas Johansen,
I think you must configure the OTG Clock Control Register. Please see Chapter 6.8 OTG Clock Control Register (OTGClkCtrl - 0xFFE0 CFF4) in the LPC24xx User Manual.
Best Regards, Martin Guenther
I know. I am doing this
PCONP |= 0x80000000; // Enable USB OTG_CLK_CTRL = 0x00000001; // Styart USB host clk // Wait for USB clk start while ((OTG_CLK_STAT & 0x00000001) == 0) { ; } // Stays in the loop forever...!!!
The OTG_CLK_CTRL is defined as: #define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 #define OTG_CLK_CTRL (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04))
So I schould write to the right register?
Hello Thomas Johansen'
I am using the USB Device on the LPC24xx and I configure the clocks as follows:
PCONP |= 0x80000000; /* USB PCLK -> enable USB Per. */ /* To set OTG_STAT_CTRL register, OTG clock needs to be enabled */ OTG_CLK_CTRL = 0x1B; /* Host, Dev, AHB clock enable */ while ((OTG_CLK_STAT & 0x1B) != 0x1B); /* This has to be set after OTG_CLK_CTRL configuration. */ OTG_STAT_CTRL = 0x03; /* U2 = device */
I think it is necessary to set AHB_CLK_EN and OTG_CLK_EN together with HOST_CLK_EN or DEV_CLK_EN.