Hi,
I want to connect a NOR flash device to the AT91SAM9260 controller tzo boot from it.
At the moment I'm using a device from spansion, because they use nor flash devices where I could read without sending an command to the flash.
The nor flash device has a sleep time (120ns) - but the processor itself is able to boot from the flash. But when I try to start a debug session I get always the error "memory missmatch".
I've one programm which is running in the internal RAM, transmitting commands (write, CFI) to the flash. After I started this programm I'm able to write a new programm to the flash and then I could start the programm (debug session). Another try after that one will fail....
I'm not sure where could be the problem.... Maybe you will have some hints for me...
Here's my debug initialization file:
DEFINE CHAR Setup; DEFINE INT Entry; DEFINE LONG PMC; DEFINE LONG PIO_SD; DEFINE LONG MATRIX; DEFINE LONG SDRAMC; DEFINE LONG SDRAM; // Memory mapped peripherals address definitions PMC = 0xFFFFFC00; PIO_SD = 0xFFFFF800; MATRIX = 0xFFFFEE00; SDRAMC = 0xFFFFEA00; SDRAM = 0x20000000; FUNC void Clock_Setup (void) { if (Setup & 0x01) { // Setup clock; XTAL = 18.432000 MHz, // PLLA = 96.109714 MHz, // Processor = 96.109714 MHz _WDWORD(PMC+ 0x20, 0x0000FF01); // CKGR_MOR: Enable main oscillator _sleep_(100); // Wait for stable Main Oscillator _WDWORD(PMC+ 0x28, 0x20483F0E); // CKGR_PLLAR: Configure PLL A _sleep_(100); // Wait for stable PLL A _WDWORD(PMC+ 0x30, 0x00000000); // PMC_MCKR: MDIV and PRES fields _sleep_(100); // Wait for Main Master Clock ready _WDWORD(PMC+ 0x30, 0x00000002); // PMC_MCKR: all fields _sleep_(100); // Wait for Main Master Clock ready } } FUNC void SDRAM_Setup (void) { if (Setup & 0x02) { // Setup SDRAM Controller // Setup pins for SDRAM controlling _WDWORD(PIO_SD+0x60, 0xFFFF0000); // Disable pull-ups _WDWORD(PIO_SD+0x70, 0xFFFF0000); // Select peripheral A _WDWORD(PIO_SD+0x04, 0xFFFF0000); // Disable PIO mode _WDWORD(MATRIX+0x11C,0x00000002); // EBI_CSA: CSA1 support for SDRAM //_WDWORD(SDRAMC+0x08, 0x85227259); // SDRAM Configuration //mein verwendeter sdram 32bit modus _WDWORD(SDRAMC+0x08, 0x85227255); // SDRAM Configuration _sleep_(10); _WDWORD(SDRAMC+0x00, 0x00000001); // Issue NOP Command _WDWORD(SDRAM+ 0x00, 0x00000000); _WDWORD(SDRAMC+0x00, 0x00000002); // Issue Precharge All Command _WDWORD(SDRAM+ 0x00, 0x00000000); _sleep_(10); _WDWORD(SDRAMC+0x00, 0x00000004); // Issue Auto-Refresh Command _WDWORD(SDRAM+ 0x04, 0x00000001); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x08, 0x00000002); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x0C, 0x00000003); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x10, 0x00000004); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x14, 0x00000005); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x18, 0x00000006); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x1C, 0x00000007); _WDWORD(SDRAMC+0x00, 0x00000004); _WDWORD(SDRAM+ 0x20, 0x00000008); _WDWORD(SDRAMC+0x00, 0x00000003); // Issue Load Mode Register Command _WDWORD(SDRAM+ 0x24, 0xCAFEDEDE); _WDWORD(SDRAMC+0x00, 0x00000000); // Enter Normal Mode _WDWORD(SDRAM+ 0x00, 0x00000000); _WDWORD(SDRAMC+0x04, 0x000002EE); // Refresh for SDRAM (at 96 MHz) } } FUNC void Remap (void) { if (Setup & 0x10) { _WDWORD(MATRIX+0x100,0x00000003); // MATRIX_MRCR: Remap IRAM to 0 } } FUNC void PC_Setup (void) { if (Setup & 0x40) { PC = Entry; } } FUNC void GoMain (void) { if ((Setup & 0xA0) == 0xA0) { exec("g,main"); } } Setup = 0xF1; Entry = 0x10000000; Clock_Setup(); SDRAM_Setup(); //Remap(); //Download(); PC_Setup(); GoMain();
best regards Gerd