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Basic information about SPI

Hi,
I am a newbie.I want to implement spi in between my arm board arm7 ( mcb2140)and another chip called pn544.
I have read the user manual
www.nxp.com/.../UM10139_1.pdf.
-----------------------------------
SPI Clock Counter Register (S0SPCCR - 0xE002 000C)
This register controls the frequency of a master’s SCK. The register indicates the number
of PCLK cycles that make up an SPI clock. The value of this register must always be an
even number. As a result, bit 0 must always be 0. The value of the register must also
always be greater than or equal to 8. Violations of this can result in unpredictable
behavior.
The SPI0 rate may be calculated as: PCLK / SPCCR0 value. The PCLK rate is
CCLK /VPB divider rate as determined by the VPBDIV register contents.
-------------------------------------
But one thing that is not clear to me is
how do we calculate SPI Clock Counter Register?
What is the value of CCLK,VPBDIV and how do we detemine SPI0 rate for microcontoller lpc2148.Please explain me is simple way .
Thanks

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  • If you look in the user manual (chapter 1.9 Block diagram), you will notice that SSEL is an input for the processor.

    But an input means that it is only relevant when the ARM is an SPI slave. When the ARM is the SPI master, i.e. the one generating the clock, then the SSEL signal is irrelevant.

    You can take _any_ GPIO signal and connect to the slave-select pin of the pn544. It is up to you to activate this GPIO pin before a transfer, and deactivate it after a transfer. In theory, you could have it activated all the time, but if you get a single false pulse on the clock signal, then the SPI slave will never be able to synchronizae again unless you toggle the slave-select signal between the transfers.

    About being able to debug SPI - have you written any debug script that simulates an SPI slave? SPI is two-way. For every byte the master sends to the slave, the slave sends a byte back to the master. But without a debugger script, the processor emulator will not know what data it should shift into the SPI data register.

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  • If you look in the user manual (chapter 1.9 Block diagram), you will notice that SSEL is an input for the processor.

    But an input means that it is only relevant when the ARM is an SPI slave. When the ARM is the SPI master, i.e. the one generating the clock, then the SSEL signal is irrelevant.

    You can take _any_ GPIO signal and connect to the slave-select pin of the pn544. It is up to you to activate this GPIO pin before a transfer, and deactivate it after a transfer. In theory, you could have it activated all the time, but if you get a single false pulse on the clock signal, then the SPI slave will never be able to synchronizae again unless you toggle the slave-select signal between the transfers.

    About being able to debug SPI - have you written any debug script that simulates an SPI slave? SPI is two-way. For every byte the master sends to the slave, the slave sends a byte back to the master. But without a debugger script, the processor emulator will not know what data it should shift into the SPI data register.

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