This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Basic information about SPI

Hi,
I am a newbie.I want to implement spi in between my arm board arm7 ( mcb2140)and another chip called pn544.
I have read the user manual
www.nxp.com/.../UM10139_1.pdf.
-----------------------------------
SPI Clock Counter Register (S0SPCCR - 0xE002 000C)
This register controls the frequency of a master’s SCK. The register indicates the number
of PCLK cycles that make up an SPI clock. The value of this register must always be an
even number. As a result, bit 0 must always be 0. The value of the register must also
always be greater than or equal to 8. Violations of this can result in unpredictable
behavior.
The SPI0 rate may be calculated as: PCLK / SPCCR0 value. The PCLK rate is
CCLK /VPB divider rate as determined by the VPBDIV register contents.
-------------------------------------
But one thing that is not clear to me is
how do we calculate SPI Clock Counter Register?
What is the value of CCLK,VPBDIV and how do we detemine SPI0 rate for microcontoller lpc2148.Please explain me is simple way .
Thanks

  • The processor has quite a lot of clocks :)

    You can have an oscillator. Say an external crystal of 12MHz (FOSC).

    You may feed this crystal oscillator (FOSC) into a PLL + divider to multiply/divide the crystal frequency to the speed you want your processor to run.

    Let's say that the PLL multiplies your 12MHz crystal (FOSC) to 360MHz (PLL). There is then a divider step to get the core frequency of the ARM. Let's say you divide 360MHz down to 60MHz. This is your CCLK and controls how fast instructions are processed.

    But you also need a speed for all your expternal peripherials (serial port, SPI, ...)

    So the CCLK can be divided into a peripherial clock (PCLK). Let's say this division is four. Then you get a PCLK of 60/4 = 15MHz.

    Now the text you had should start to make sense:
    "The SPI0 rate may be calculated as: PCLK / SPCCR0 value. The PCLK rate is
    CCLK /VPB divider rate as determined by the VPBDIV register contents."

    PCLK = CCLK / VPB gives instruction frequency down to peripherial frequency.

    SPI0 rate = PCLK / SPCCR0 means that to get a specific SPI bit rate, you take SPCCR0 = PCLK / SPI0_rate with the extra limitations that this value must be at least 8, and must be even.

  • Thanks for replying and explaing me so well.
    But one question,how do i know the speed for the expternal peripherials like spi,i2c.

  • Hello,
    I am implementing spi interface with arm board lpc2148 as master and
    another chip pn544 as slave(1 master and 1 slave)
    But,S0SPDR register always show 0x00 value when i run my code in keil debug
    environment and some other value like 0xff or 0x7f when i download the
    program on arm board and use debugger to trace the value.
    Please tell me what is wrong in my code
    My code is

    #include <stdio.h>
    #include <RTL.h>
    #include <LPC21xx.H> /* LPC214x definitions
    */
    
    volatile unsigned char spi_stat;
    volatile unsigned int spi_data;
    
    void main (void) {
    
    //PINSEL0 = 0x00005500; // SPI Pins - SSEL0 needs pull-up (1)
    PINSEL0 = 0x00001500; // SPI Pins - no pull-up on SSEL0 (2)
    IODIR0 = 0x00000400; // Chipselect
    //IODIR0 = 0x00000080;
    S0SPCCR = 0x08;
    S0SPCR = 0x20; // Master, CPOL=0, CPHA=0, 8 bits
    spi_stat = S0SPSR; // Clear status register flags...
    spi_data = S0SPDR; // ... with accessing data register
    
    while(1){
    IOCLR0 = 0x00000080;//0x00000400; //select slave
    S0SPDR = 0x05; //send data to slave
    while((S0SPSR&0x80)==0x00); //wait for transfer to finish
    IOSET0 = 0x00000080;//0x00000400; //deselect slave
    
    }
    }
    

  • What does your oscilloscope tells you?

    Do the slave-select line activate during the transfer?

    Do you get a burst of clock signals when you do the transfer? Is the clock frequency matching the baudrate you expected?

    Do you see your transmitted data on the MOSI line?

    Is clock and data out using the correct phase that you expected?

    Do you see any data on the MISO signal during the transfer?

    If the slave doesn't send out the data, then you are expected to receive 0xff or 0x00 after the transfer, depending on if the MISO is held statically high or low.

    You post source code for us to read. But you do not post any information telling that _you_ have spent any time verifying that your code is correct, and that your hardware is correct.

    Wouldn't it be better if we don't have to spend time with your code until you have made the standard tests - and reported the results of them?

  • Hi
    I agree to what you said that i should check my code.
    As a part of chaecking my code,i was running it in my debug environment of keil microvision so that atleast i see the value of the register S0SPDR.I didn't use any hardware...no arm board no pn544 just the keil environemt.
    But it always show 0x00.Can keil environment not simulate spi??
    Please one basic doubt.If you can provide me with some clear picture it would be gr8
    1)what is the difference between
    PINSEL0 = 0x00005500 and PINSEL0 = 0x00001500;
    What i understand is with 0x00005500 the SSEL0(slave select pin is high)and i don't need to use
    IODIR0 = 0x00000080;// Chipselect
    IOCLR0 = 0x00000080;
    IOSET0 = 0x00000080; //deselect slave
    Is it right??

  • If you look in the user manual (chapter 1.9 Block diagram), you will notice that SSEL is an input for the processor.

    But an input means that it is only relevant when the ARM is an SPI slave. When the ARM is the SPI master, i.e. the one generating the clock, then the SSEL signal is irrelevant.

    You can take _any_ GPIO signal and connect to the slave-select pin of the pn544. It is up to you to activate this GPIO pin before a transfer, and deactivate it after a transfer. In theory, you could have it activated all the time, but if you get a single false pulse on the clock signal, then the SPI slave will never be able to synchronizae again unless you toggle the slave-select signal between the transfers.

    About being able to debug SPI - have you written any debug script that simulates an SPI slave? SPI is two-way. For every byte the master sends to the slave, the slave sends a byte back to the master. But without a debugger script, the processor emulator will not know what data it should shift into the SPI data register.