Hello, I am mapping interrupts to RAM (MEMMAP = 2). I want to overwrite some of the contents of 0x40000000 with my own address (namely, 0x40000008, that is the SWI handler). I know what I want: I need to install a branch instruction like
LDR PC, SWI_Handler
But when I look at address 0x0 (just for an example of how it is done in flash), I see the following repeating pattern:
0x0 18F09FE5 0x4 18F09FE5 0x8 18F09FE5 0xC 18F09FE5
I would expect to find there different instructions! What gives?
> But I "guess", maybe it is due to that, you do not > implement the related xxxx_Handler. So KEIL just > simply optimizes them.
I was stupid. Though I haven't become smarter, I get better understanding about the exception handlers.
The machine code 18F09FE5 (E59FF018) means LDR PC, [PC, #0x0018] This is a "PC - relative addressing".
Each triggered exception handler has a different PC value, so the processor will fetch a different instruction from a different address.
For example:
Vectors LDR PC, Reset_Addr LDR PC, Undef_Addr LDR PC, SWI_Addr LDR PC, PAbt_Addr LDR PC, DAbt_Addr NOP ; Reserved Vector LDR PC, [PC, #-0x0120] ; Vector from VicVectAddr LDR PC, FIQ_Addr
Reset_Addr at 0x00000000 is an instruction -> LDR PC, [PC, #0x0018] After it is executed, it will load the content of address (0x0000 + 0x4 + 0x4 + 0x0018) 0x0020 into PC. In my case, the content of address 0x0020 is 0x0054, So the value of Program Counter will become 0x0054.
> Reset_Addr at 0x00000000 is an instruction -> LDR PC, [PC, #0x0018]
Reset Handler at 0x00000000 is an instruction -> LDR PC, [PC, #0x0018]