I'm using the LPC2378 (MCB2300) with an external serial flash ( M25P80). I use the SSP port to have the fastest SPI clock (18MHz).
I succeed in using SSP0 clock at 18MHz but my issue is that my interrupt is too long (i build my own routine interrupt from an internet code). Thus, using a clock of 4.5MHz give me the same writing or reading timings than using a 18MHz clock. That is to say that my interrupt takes 1.4us to act and 1.1us to start. So in 2.5us I can put 8 clocks at 4.5MHz (8*222ns=1.8us) as well as 8 clocks at 18MHz(8*56ns=444ns).
I'm sure that some people worked at high frequency but did they measure the 'real' writing and reading timings ?
I wonder if someone already used a SSP interrupt faster than 1 us ?
Any help is welcomed. Thanks everybody.
Single-byte transfers will always be limited by your interrupt handler speed. Not only will your ISR consume time, but the chip may have some other interrupt source that needs service first.
Are you using the FIFO, allowing you to read and write multiple bytes in the ISR?
Have you looked at DMA transfers, to support transfers way larger than the FIFO depth without constant reloads?
Yes I'm using the fifo, but the fastest way I've found is doing all my frame in the same interrupt, and it's not a clean way according to me ! I'm working on the DMA from an NXP example concerning SSP. But it is very light and at the moment, it seems very hard to me just to read my slave's status register. I think my first step is that I need to manually do the 'Chip select' at the right moment and only send 2 bytes. Now, my DMA channel seems to relaod constantly. Anyway, thank you so much, I will find something...