Hello,
We are working on 8051 project and the code size is large around 100 K with code banking. We are faceing some problem in our products, kindly give your valued suggestions.
We are using Keil PK51 Version 8.05 and Phillips 89c52X2BN micro controller.
1. How many functions can be nested in an Interrupt Service Routine(ISR) or what is the depth of functions called from ISR?
2. What could be the maximum code size of an Interrupt service Routine including its all sub-functions, if the interrupt occurs every 20 milliseconds?
3. If we are using Timer 0 interrupt and reloading the timer registers TL0 and TH0 at every ISR subroutine start, when should we set the timer run bit(TR0 = 1) _at start of ISR or at the end of ISR code(in order to generate an exact delay we wanted)?
4. What is the memory allocation pattern for xdata variables (used in our project) by Keil compiler or is there any basic allocation method followed by Keil compiler?
5. What are the disadvantages of using absolute memory accesses(using _at_ ) for xdata variables if I use 64K external RAM, and what is the burden on the 8051 core controller
6. What could be the maximum permissible code size of common area if I use code banking with 2 code banks? I dedicated 6150 bytes code for common area in my project. Is it justified?
7. I used optimization level 9 for my project compilation. What are the adverse effects on the 8051 core controller if I use this highest level? What are the advantages and disadvantages? With this level of optimization, my code size is 104Kbytes of total 128Kbytes.
8. Is there a maximum limit to the size of the memory allocated to a structure that is compiled by Keil? I am using structure variables which use 150 bytes of xdata space each. Can I use a single structure which uses this much memory space?
9. Datatype {long} is not being supported in my project. If I create a variable of type {long}, there are no errors in compilation. But, the system is not functioning / booting . Are there any limitations in using {long} type?
10. Will Keil compiler support Timer 2 interrupt usage, if I use Timer 2 interrupt in my project with 8052 processor?
11. What are the advantages and disadvantages for the 89C52X2 core controller if I use 6x clock speed of execution instead of default 12x speed
12. What could be the maximum code size of an individual function in a Keil-compiled project?
kindly advise.
1) As few as you can manage. An ISR should do _very_little_work_ so if you are worrying about nesting levels you are already doing too much.
2) Code size and runtime are not directly correlated. However, you should not perform any real work in the ISR, so the question shouldn't be important anyway.
3) Depends on which frequency to divide from.
4) I don't understand your question. It sounds more like a question to make for dyanmically allocated memory. The linker will place xdata variables directly after each other. The memory model will control what memory areas the Keil compiler should use - unless you specifically force the use of a memory region.
5) Let's reverse the question: What reason do you have for absolute positioning of your xdata variables?
6) Wouldn't 32k + 32k be a good partitioning? Or are you basically writing two separate applications, with the common are no more than basically a boot loader?
8) Depends on memory region. 150 byte xdata structs shouldn't be a problem.
9) Why isn't long supported? Have you read: http://www.keil.com/support/man/docs/c51/c51_ap_datastorage.htm I don't work with the C51, so someone will probably correct me now but: Have you checked if you need any 32-bit helper functions, and are they linked into the common code? 10) Why would the Keil compiler not support your processor? 11) Current consumption contra speed? 12) Have you written a too large function? In that case, I think it is in acute need of splitting.