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ISR query

Hello,

We are working on 8051 project and the code size is large around 100 K with code banking. We are faceing some problem in our products, kindly give your valued suggestions.

We are using Keil PK51 Version 8.05 and Phillips 89c52X2BN micro controller.

1. How many functions can be nested in an Interrupt Service Routine(ISR) or what is the depth of functions called from ISR?

2. What could be the maximum code size of an Interrupt service Routine including its all sub-functions, if the interrupt occurs every 20 milliseconds?

3. If we are using Timer 0 interrupt and reloading the timer registers TL0 and TH0 at every ISR subroutine start, when should we set the timer run bit(TR0 = 1) _at start of ISR or at the end of ISR code(in order to generate an exact delay we wanted)?

4. What is the memory allocation pattern for xdata variables (used in our project) by Keil compiler or is there any basic allocation method followed by Keil compiler?

5. What are the disadvantages of using absolute memory accesses(using _at_ ) for xdata variables if I use 64K external RAM, and what is the burden on the 8051 core controller

6. What could be the maximum permissible code size of common area if I use code banking with 2 code banks? I dedicated 6150 bytes code for common area in my project. Is it justified?

7. I used optimization level 9 for my project compilation. What are the adverse effects on the 8051 core controller if I use this highest level? What are the advantages and disadvantages? With this level of optimization, my code size is 104Kbytes of total 128Kbytes.

8. Is there a maximum limit to the size of the memory allocated to a structure that is compiled by Keil? I am using structure variables which use 150 bytes of xdata space each. Can I use a single structure which uses this much memory space?

9. Datatype {long} is not being supported in my project. If I create a variable of type {long}, there are no errors in compilation. But, the system is not functioning / booting . Are there any limitations in using {long} type?

10. Will Keil compiler support Timer 2 interrupt usage, if I use Timer 2 interrupt in my project with 8052 processor?

11. What are the advantages and disadvantages for the 89C52X2 core controller if I use 6x clock speed of execution instead of default 12x speed

12. What could be the maximum code size of an individual function in a Keil-compiled project?

kindly advise.

Parents
  • 1. How many functions can be nested in an Interrupt Service Routine(ISR) or what is the depth of functions called from ISR?

    That depends on your stack size.

    2. What could be the maximum code size of an Interrupt service Routine including its all sub-functions, if the interrupt occurs every 20 milliseconds?

    The code size is not limited. The ISR could take up all available code space if necessary. The limiting factor would be the execution time of the ISR, which should of course be less than 20 ms, and much less than 20 ms if the processor is supposed to do anything else.

    3. If we are using Timer 0 interrupt and reloading the timer registers TL0 and TH0 at every ISR subroutine start, when should we set the timer run bit(TR0 = 1) _at start of ISR or at the end of ISR code(in order to generate an exact delay we wanted)?

    That depends on how precisely the execution time of the ISR is known. If the ISR has a fixed execution time, you may need to adjust the reload value, but the timer could be started at the end of the ISR. Of course, the easier way would be starting it at the beginning of the ISR.

    4. What is the memory allocation pattern for xdata variables (used in our project) by Keil compiler or is there any basic allocation method followed by Keil compiler?

    The compiler does not allocate any memory in most cases. That is the job of the linker.

    5. What are the disadvantages of using absolute memory accesses(using _at_ ) for xdata variables if I use 64K external RAM, and what is the burden on the 8051 core controller.

    The MCU does not care who (compiler or linker) put a variable in a certain place. The burden is exactly the same.
    The disadvantages are that it's messy and that such variables cannot be initialized. It's usually better to leave this job to the linker.

    6. What could be the maximum permissible code size of common area if I use code banking with 2 code banks? I dedicated 6150 bytes code for common area in my project. Is it justified?

    That depends on your exact memory layout.

    7. I used optimization level 9 for my project compilation. What are the adverse effects on the 8051 core controller if I use this highest level? What are the advantages and disadvantages? With this level of optimization, my code size is 104Kbytes of total 128Kbytes.

    There aren't any adverse effects for MCU (why should there ? adverse effects would mean that the program is faulty).
    There may be adverse effects for the programmer, namely that highly optimized code is more difficult to debug. Also, bugs that were in the code before might have more noticable effects with high optimization settings.

    8. Is there a maximum limit to the size of the memory allocated to a structure that is compiled by Keil? I am using structure variables which use 150 bytes of xdata space each. Can I use a single structure which uses this much memory space?

    The limit is only placed by the amount of available memory (there's no point of, for example, putting a 150 byte structure in idata space).

    9. Datatype {long} is not being supported in my project. If I create a variable of type {long}, there are no errors in compilation. But, the system is not functioning / booting . Are there any limitations in using {long} type?

    No, there are no limitiations (other than long arithmetics taking a long time on an 8 bit MCU, but that is not the fault of the compiler). If your system is not functioning, then the problem lies most, most likely in your code.

    10. Will Keil compiler support Timer 2 interrupt usage, if I use Timer 2 interrupt in my project with 8052 processor?

    The compiler does not care about the hardware. Using the timer 2 interrupt is up to you.

    11. What are the advantages and disadvantages for the 89C52X2 core controller if I use 6x clock speed of execution instead of default 12x speed

    The advantage is that the code runs twice as fast. The downside is that the code runs twice at fast, which may break timing loops, etc, that rely on a certain execution speed.

    12. What could be the maximum code size of an individual function in a Keil-compiled project?

    That depends on the ROM model used (small/compact/large, and not to be confused with the memory model) and the status of the compiler (full version or restricted/eval version). Other than that, one function may take up all available memory, there's no limit.

    These questions all sound fairly theoretical and the answers are all readily available in the documentation. Are you sure this isn't homework ?

Reply
  • 1. How many functions can be nested in an Interrupt Service Routine(ISR) or what is the depth of functions called from ISR?

    That depends on your stack size.

    2. What could be the maximum code size of an Interrupt service Routine including its all sub-functions, if the interrupt occurs every 20 milliseconds?

    The code size is not limited. The ISR could take up all available code space if necessary. The limiting factor would be the execution time of the ISR, which should of course be less than 20 ms, and much less than 20 ms if the processor is supposed to do anything else.

    3. If we are using Timer 0 interrupt and reloading the timer registers TL0 and TH0 at every ISR subroutine start, when should we set the timer run bit(TR0 = 1) _at start of ISR or at the end of ISR code(in order to generate an exact delay we wanted)?

    That depends on how precisely the execution time of the ISR is known. If the ISR has a fixed execution time, you may need to adjust the reload value, but the timer could be started at the end of the ISR. Of course, the easier way would be starting it at the beginning of the ISR.

    4. What is the memory allocation pattern for xdata variables (used in our project) by Keil compiler or is there any basic allocation method followed by Keil compiler?

    The compiler does not allocate any memory in most cases. That is the job of the linker.

    5. What are the disadvantages of using absolute memory accesses(using _at_ ) for xdata variables if I use 64K external RAM, and what is the burden on the 8051 core controller.

    The MCU does not care who (compiler or linker) put a variable in a certain place. The burden is exactly the same.
    The disadvantages are that it's messy and that such variables cannot be initialized. It's usually better to leave this job to the linker.

    6. What could be the maximum permissible code size of common area if I use code banking with 2 code banks? I dedicated 6150 bytes code for common area in my project. Is it justified?

    That depends on your exact memory layout.

    7. I used optimization level 9 for my project compilation. What are the adverse effects on the 8051 core controller if I use this highest level? What are the advantages and disadvantages? With this level of optimization, my code size is 104Kbytes of total 128Kbytes.

    There aren't any adverse effects for MCU (why should there ? adverse effects would mean that the program is faulty).
    There may be adverse effects for the programmer, namely that highly optimized code is more difficult to debug. Also, bugs that were in the code before might have more noticable effects with high optimization settings.

    8. Is there a maximum limit to the size of the memory allocated to a structure that is compiled by Keil? I am using structure variables which use 150 bytes of xdata space each. Can I use a single structure which uses this much memory space?

    The limit is only placed by the amount of available memory (there's no point of, for example, putting a 150 byte structure in idata space).

    9. Datatype {long} is not being supported in my project. If I create a variable of type {long}, there are no errors in compilation. But, the system is not functioning / booting . Are there any limitations in using {long} type?

    No, there are no limitiations (other than long arithmetics taking a long time on an 8 bit MCU, but that is not the fault of the compiler). If your system is not functioning, then the problem lies most, most likely in your code.

    10. Will Keil compiler support Timer 2 interrupt usage, if I use Timer 2 interrupt in my project with 8052 processor?

    The compiler does not care about the hardware. Using the timer 2 interrupt is up to you.

    11. What are the advantages and disadvantages for the 89C52X2 core controller if I use 6x clock speed of execution instead of default 12x speed

    The advantage is that the code runs twice as fast. The downside is that the code runs twice at fast, which may break timing loops, etc, that rely on a certain execution speed.

    12. What could be the maximum code size of an individual function in a Keil-compiled project?

    That depends on the ROM model used (small/compact/large, and not to be confused with the memory model) and the status of the compiler (full version or restricted/eval version). Other than that, one function may take up all available memory, there's no limit.

    These questions all sound fairly theoretical and the answers are all readily available in the documentation. Are you sure this isn't homework ?

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