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Hello
I'm using: mcb32stmf103rb6t The uvision3 V3.62c Realview MDK-ARM Version 3.23
In my program i need to multiply a series of 32bit ints. Very simple code:
int test1 = 0x01002000; int test2 = 0x03004000; test1 = test2*test1;
When i compile it and view the disassembly in debug mode is says: 129: int test1 = 0x01002000; 0x08004788 4D3F LDR r5,[pc,#252] 130: int test2 = 0x03004000; 131: 0x0800478A 4C40 LDR r4,[pc,#256] 132: test1 = test2*test1; 133: 0x0800478C 4365 MULS r5,r4,r5
The question then is: Why does it use "MULS" when the instruction does not exits in the cortex-m3? And why does it choose an instruction where the MSB are thrown away when when I need the MSB?
An explanation will be very much appreciated Regards Henrik
I don't know why it using an instruction you claim isn't supported. Did you select the correct processor when creating the project?
What do you mean by throwing away the most significant byte? Throwing away a byte is a 8-bit decision.
Where you planning on multiplying two 32-bit numbers to produce a 64-bit result? C doesn't have any way to tell the compiler about such an operation. You may get it to perform a 64-bit multiplication by type-casting one of the two input variables to a 64-bit size.
In some situations, the compiler can be smart enough to see the numeric range of the input variables and optimize away the sign- och zero-extend before the multiplication. But that is up to the compiler and requires that the compiler can see the max possible values stored in the two operands.
S is an optional suffix. If S is specified, the condition code flags are updated on the result of the operation.
Yup, I have chosen the target to be the mcb32stmf103rb, and the cortex - M3, according to the technical reference does have that instruction.
I tried typecasting with "long long" which is 64bit, same result. The LSB are put into the register instead of the MSB.
However, the main concern is the MULS. I might be mistaken when i say that the instruction does not exists, but I have checked several referances and I am fairly certain. Is there an explanation?
Thank you for your time Regards Henrik Rasmussen
So the instruction i s acutally the MUL, but suffix enables the code flag?
That's exactly right.