Checker board algorithm

Your above summary does not represent a complete test.

Such a test will only verify the least significant (odd/even) address line. You may have other address lines that are stuck at zero or one. That is why the Greg Neff test has a step 3.

It does test a number of errors on data lines, but unless the test is run twice - one time 0xAA, 0x55 and one time 0x55, 0xAA will not find memory bits that can't store a zero or a one. That is why the Greg Neff test has a step 2.

The link suggestion to handle address line problems requires that you save all data before testing the RAM. It is possible to test the address lines without need to stash the full RAM contents, by specifically target address line aliasing, i.e. to write zero to all aliased locations, then write 0xFF and verify that the targeted address contains 0xFF while the aliased locations still has 0x00. Since you may have two aliased locations for each address line, such a test requires a limited number of bytes to be saved before verifying the address lines.

Another thing: Tests to check for stuck signals with resulting aliasing problems should be written specifically for the used architecture, since multiplexing of address/data or multilexing of row/column (high/low part of address) affects the possible errors. Or you can go the general case. Assuming that any data line may lock up or interfere with any address line and perform the "full" set of aliasing tests.

Your above summary does not represent a complete test.

Such a test will only verify the least significant (odd/even) address line. You may have other address lines that are stuck at zero or one. That is why the Greg Neff test has a step 3.

It does test a number of errors on data lines, but unless the test is run twice - one time 0xAA, 0x55 and one time 0x55, 0xAA will not find memory bits that can't store a zero or a one. That is why the Greg Neff test has a step 2.

The link suggestion to handle address line problems requires that you save all data before testing the RAM. It is possible to test the address lines without need to stash the full RAM contents, by specifically target address line aliasing, i.e. to write zero to all aliased locations, then write 0xFF and verify that the targeted address contains 0xFF while the aliased locations still has 0x00. Since you may have two aliased locations for each address line, such a test requires a limited number of bytes to be saved before verifying the address lines.

Another thing: Tests to check for stuck signals with resulting aliasing problems should be written specifically for the used architecture, since multiplexing of address/data or multilexing of row/column (high/low part of address) affects the possible errors. Or you can go the general case. Assuming that any data line may lock up or interfere with any address line and perform the "full" set of aliasing tests.