problem (continue and again)

i wrote about similiar problem http://www.keil.com/forum/docs/thread9546.asp

and now i have same problem
i use odd adres memory (for example) and got problem
text test progfam for ARM you may see

if used odd adres 0x801 i had problem if didnt use __packed
if i used __packed i have no problem

IDE-Version:
µVision3 V3.51
Copyright (c) Keil Elektronik GmbH / Keil Software, Inc. 1995 - 2007

Tool Version Numbers:
Toolchain Path:    BIN30\ 
C Compiler:         ARM/Thumb C/C++ Compiler, RVCT3.0 [Build 951] for uVision [Full]
Assembler:          ARM/Thumb Macro Assembler, RVCT3.0 [Build 951] for uVision [Full]
Linker/Locator:     ARM Linker, RVCT3.0 [Build 951] for uVision [Full]
Librarian:          ARM Archiver, RVCT3.0 [Build 951] for uVision
Hex Converter:      ARM FromELF, RVCT3.0 [Build 951] for uVision [Full]
CPU DLL:            SARM.DLL       V3.05
Dialog DLL:         DARMP.DLL       V1.13b
Target DLL:         BIN\UL2ARM.DLL       V1.26b
Dialog DLL:         TARMP.DLL       V1.11f

****************************************************************
command compiler if you want get the same result

-c --device DARMP -g -O0 --apcs=interwork -I "C:\Keil\ARM\INC\Philips" -o "*.o"
****************************************************************
int main()
{
        volatile unsigned long  work;

#define  reg0    ( *(volatile unsigned long __packed *)0x801)
//#define  reg0          ( *(volatile unsigned long *)0x801)

        work=reg0;

}

****************************************************************
#define  reg0    ( *(volatile unsigned long *)0x801)
     8:         work=reg0;
     9:
0x000001B0  E3A00001  MOV       R0,#0x00000001
0x000001B4  E5901800  LDR       R1,[R0,#0x0800]

****************************************************************

#define  reg0    ( *(volatile unsigned long __packed *)0x801)
     8:         work=reg0;
     9:
0x000001B4  E59F0010  LDR       R0,[PC,#0x0010]
0x000001B8  EB000004  BL        0x000001D0
0x000001BC  E1A04000  MOV       R4,R0
    10: }
0x000001C0  E3A00000  MOV       R0,#0x00000000
0x000001C4  E8BD4010  LDMIA     R13!,{R4,R14}
0x000001C8  E12FFF1E  BX        R14
0x000001CC  00000801  DD        0x00000801
0x000001D0  E5D02001  LDRB      R2,[R0,#0x0001]
0x000001D4  E5D01000  LDRB      R1,[R0]
0x000001D8  E5D03002  LDRB      R3,[R0,#0x0002]
0x000001DC  E5D00003  LDRB      R0,[R0,#0x0003]
0x000001E0  E1811402  ORR       R1,R1,R2,LSL #8
0x000001E4  E1811803  ORR       R1,R1,R3,LSL #16
0x000001E8  E1810C00  ORR       R0,R1,R0,LSL #24
0x000001EC  E12FFF1E  BX        R14