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ST timer problems

Hello,

Could you help to install the ST timer on the AT91Rm9200? I don't know how to setup the AIC registers correct. Maybe there are more than one big mistake.

void initialize_pit()
{
        unsigned int  flag, period, irq_id, mask, oldHandler, src_type, priority;
        volatile int status;
        void *newHandler;

        //period
    Timer0->ST_PIMR = period << 5;

        AT91F_ST_SetPeriodInterval(Timer0, period);
        //state
        //status = Timer0->ST_SR;

        //enable interrupt
        flag=1;
        Timer0->ST_IER = flag;

        AT91F_ST_EnableIt( Timer0, flag);

        //enable PMC
        AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 1 << AT91C_ID_IRQ0);

        //config AIC
        irq_id = 0;
        oldHandler = pAic->AIC_SVR[irq_id];
        mask = 0x1 << irq_id;
        pAic->AIC_IDCR = mask ;
        pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;

        //* Store the Source Mode Register
    pAic->AIC_SMR[irq_id] = src_type | priority  ;


        AT91F_AIC_ConfigureIt(pAic, irq_id, priority, src_type, newHandler);

        //enable AIC
        AT91F_AIC_EnableIt(pAic, 1);
}

I hope somebody could help me with this problem...

best regards
johannes

Parents Reply Children
  • No, that is desinformation. 0x1 and 1 are exactly the same - just two numeric representations of the same value.

  • Per could you tell me which parts of the code are not correct?

    johannes

  • I'm not working with that line of chips myself. I am using NXP chips.

    To tell you why your code does not work, I would have to retrieve the datasheet for your chip - and probably also take a peek at the sample code or application notes for your chip.

    What time have you spent with the datasheet and with the available sample code? Have you looked for application notes?

    I'm not too much into distributed programming/debugging. I prefer distributed computing.

  • Per could you tell me which parts of the code are not correct?

    It looks fairly correct now.

    How do you test it ? Are you working with an emulator/ICE and are able to set a breakpoint in the ISR ? Are you waiting for the chip to send something over the USART (which may or may not be initialized correctly, your code doesn't show that part nor any calls to an initialization function) ?

    Personally, I am working with the fairly similar AT91SAM7S, and did get the PIT to work.

  • the usart is working correct - I test it. Therefore there must be still a problem that the ST_interrupt function don't run.

    AT91PS_USART COM1_1;                                               /* Variable COM1 für die Struct _AT91S_USART definieren */
    void initialize_usart1()
    {
    
            COM1_1= AT91C_BASE_US1;                         /* AT91C_BASE_US1 ist die Base-Adresse für den UART1 */
    
            /* Define RXD and TXD as peripheral     */
        AT91F_PIO_CfgPeriph(AT91C_BASE_PIOB,AT91C_PB21_RXD1 | AT91C_PB20_TXD1,0);
    
            // First, enable the clock of the PIOB (for the USART)
            AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1<<AT91C_ID_US1 ) ;
    
            // Usart Configure
            AT91F_US_Configure (COM1_1, MCK,AT91C_US_ASYNC_MODE, 115200, 0);
    
            // Enable usart
            COM1_1->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
            // setzen der beiden Variablen im US_CR Register
    
            AT91F_US_PutChar (COM1_1,'X');
    
            while( !(COM1_1->US_CSR  & AT91C_US_TXRDY) )
                         continue;
    }
    

    I'm working with uvision3 and ulink2.

    johannes

  • when I start the program, I can send one character 'u' via the usart - but that's it.

    johannes

  • when I start the program, I can send one character 'u' via the usart - but that's it.

    Do you have access to an emulator (i.e. can you set breakpoints in the program and single-step through it) ?

    If so, try setting a breakpoint inside the ST interrupt handler. Also, try setting one inside the ST initialization function and single-step through it (you should also be able to watch the contents of the ST registers change).