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0x0-0xFA00 checksum calculation

Hi there!

Can anybody help me with my problem?

If I calculate checksum from 0x0 to 0x3000 - it is OK.
But if I want to calculate 0x0 to 0xFA00 range - checksum is different every microcontroller reboot. I wrote programm in flash and start MK from there, not as bootstrap. Checksum shows at LCD.

Thanks

Some data:
Shecksum calculation procedure:

 unsigned char CheckChecksum (void)
{
        unsigned char *start_addr;
        unsigned int len, step, i = 0;
        unsigned char checksum = 0;

         start_addr = 0x000;
        len = 0xFA00;//0x3000;

        step = len / 22;

        ShowCalcCheckSum( len ); // Out some info on LCD

        for (i = 0; len > 0; len--, start_addr++, i++)
        {
                checksum += *start_addr;

                 if ( i == step )
                {
                        WriteByte(0x0,1);
                        i = 0;
                }

        }


        FlashChecksum = checksum;

        return checksum;
}

.BAT file for insert correct checksum in hex-file

c:\keil\uv3\hex2bin %1.H86
c:\keil\uv3\check8  %1.bin /s0x00 /e0xF9FE /p0xF9FF /v0x80
c:\keil\uv3\bin2hex %1.bin %1a.H86

.

Parents
  • You want this startup.a66 file?

     ;------------------------------------------------------------------------------
    ;
    ; Definitions for SYSCON Register (System Configuration):
    ; -------------------------------------------------------
    ;
    ; MCTC: Memory Cycle Time (SYSCON.0 .. SYSCON.3):
    ; Note: if RDYEN == 1 a maximum number of 7 waitstates can be selected
    _MCTC   EQU     1       ; Memory wait states is 1 (MCTC = 0EH).
    ;                       ; (Reset Value = 15 additional state times)
    ;
    ; RWDC: Read/Write Signal Delay (SYSCON.4):
    _RWDC   EQU     0       ; 0 = Delay Time     0.5 States (Reset Value)
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; MTTC: Memory Tri-state Time (SYSCON.5):
    _MTTC   EQU     1       ; 0 = Delay Time     0.5 States (Reset Value)
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; BTYP_ENABLE: Enable External Bus Configuration Control Bits
    ; --- Set BTYP_ENABLE = 1 to allow modification of BTYP and BUSACT field
    ;                         in the SYSCON register.
    $SET (BTYP_ENABLE = 0)
    ;
    ; BTYP: External Bus Configuration Control (SYSCON.7 .. SYSCON.6):
    ; Note: These bits are only valid if _BUSACT == 1.
    _BTYP   EQU     0       ; 0 = 8 Bit Non Multiplexed
    ;                       ; 1 = 8 Bit Multiplexed
    ;                       ; 2 = 16 Bit Multiplexed
    ;                       ; 3 = 16 Bit Non Multiplexed
    ;
    ; CLKEN: System Clock Output Enable bit (SYSCON.8):
    _CLKEN  EQU     0       ; 0 = disabled    (Reset Value)
    ;                       ; 1 = enabled
    ;
    ; BYTDIS: Byte High Enable pin control bit (SYSCON.9):
    _BYTDIS EQU     0       ; 0 = enabled     (Reset Value)
    ;                       ; 1 = disabled
    ;
    ; BUSACT: Bus Active Control Bit (SYSCON.10):
    _BUSACT EQU     1       ; 0 = disabled
    ;                       ; 1 = enabled     (Reset Value)
    ;
    ; SGTDIS: Segmentation Disable control bit (SYSCON.11):
    $IF TINY
    _SGTDIS EQU     1       ; disable segmented mode for TINY model
    $ELSE
    _SGTDIS EQU     0       ; enable segmented mode (Reset Value)
    $ENDIF
    ;
    ; RDYEN: READY# Input Enable control bit (SYSCON.12):
    _RDYEN  EQU     0       ; 0 = disabled    (Reset Value)
    ;                       ; 1 = enabled
    ;
    ; RDY_AS: Synchronous / Asynchronous READY# Input (SYSCON.3):
    ; Note: This bit is only valid if _RDYEN == 1.
    _RDY_AS EQU     0       ; 0 = synchronous READY# input
    ;                       ; 1 = asynchronous READY# input
    ;
    ; STKSZ: Maximum System Stack Size selection  (SYSCON.13 .. SYSCON.14)
    ;  Defines the system stack space which is used by CALL/RET and PUSH/POP
    ;  instructions.  The system stack space must be adjusted according the
    ;  actual requirements of the application.
    $SET (STK_SIZE = 0)
    ;     System stack sizes:
    ;       0 = 256 words (Reset Value)
    ;       1 = 128 words
    ;       2 =  64 words
    ;       3 =  32 words
    ;       4 = not implemented
    ;       5 = not implemented
    ;       6 = not implemented
    ;       7 = size adjustable (up to 512 bytes in on-chip RAM, start at 0FA00H)
    ; If you have selected 7 for STK_SIZE, you can set the actual system stack size
    ; with the following SSTSZ statement.
    SSTSZ   EQU     200H    ; set System Stack Size to 200H Bytes
    ;
    ; USTSZ: User Stack Size Definition
    ;  Defines the user stack space available for automatics.  This stack space is
    ;  accessed by R0.  The user stack space must be adjusted according the actual
    ;  requirements of the application.
    USTSZ   EQU     1000H   ; set User Stack Size to 1000H Bytes.
    ;
    ; EXT_RAM: External RAM Write Access Enable (P3.13 = WR-Pin)
    ; --- Remove following statement if no external RAM is used
    $SET (EXT_RAM)
    ;
    ; WATCHDOG: Disable Hardware Watchdog
    ; --- Set WATCHDOG = 1 to enable the Hardware watchdog
    $SET (WATCHDOG = 0)
    ;
    ;
    ; CLR_MEMORY: Disable Memory Zero Initialization of RAM area
    ; --- Set CLR_MEMORY = 0 to disable memory zero initilization
    $SET (CLR_MEMORY = 1)
    ;
    ; INIT_VARS: Disable Variable Initilization
    ; --- Set INIT_VARS = 0 to disable variable initilization
    $SET (INIT_VARS = 1)
    ;
    ; DPPUSE:  Re-assign DPP registers
    ; --- Set DPPUSE = 0 to reduce the code size of the startup code, if you
    ;                    are not using the L166 DPPUSE directive.
    $SET (DPPUSE = 1)
    ;
    ;------------------------------------------------------------------------------
    ;
    ; BUSCON1/ADDRSEL1 Initialization
    ; ===============================
    ;
    ;
    ; BUSCON1/ADDRSEL1
    ; --- Set BUSCON1 = 1 to initialize the BUSCON1/ADDRSEL1 registers
    
    
    ;  CHANGED from 0
    
    
    $SET (BUSCON1 = 1)
    ;
    ; Define the start address and the address range.
    ; These values are used to set the ADDRSEL1 register
    %DEFINE (ADDRESS1) (20000H)      ; Set CS1# Start Address (default 20000H)
    %DEFINE (RANGE1)   (128K)        ; Set CS1# Range (default 128K)
    ;
    ; MCTC1: Memory Cycle Time (BUSCON1.0 .. BUSCON1.3):
    ; Note: if RDYEN1 == 1 a maximum number of 7 waitstates can be selected
    _MCTC1   EQU    1       ; Memory wait states is 1 (MCTC1 field = 0EH).
    ;
    ; RWDC1: Read/Write Signal Delay (BUSCON1.4):
    _RWDC1   EQU    0       ; 0 = Delay Time     0.5 States
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; MTTC1: Memory Tri-state Time (BUSCON1.5):
    _MTTC1   EQU    1       ; 0 = Delay Time     0.5 States
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; BTYP1: External Bus Configuration Control (BUSCON1.6 .. BUSCON1.7):
    _BTYP1   EQU    0       ; 0 = 8 Bit Non Multiplexed
    ;                       ; 1 = 8 Bit Multiplexed
    ;                       ; 2 = 16 Bit Multiplexed
    ;                       ; 3 = 16 Bit Non Multiplexed
    ;
    ; ALECTL1: ALE Lengthening Control Bit (BUSCON1.9):
    _ALECTL1 EQU    0       ; see data sheet for description
    ;
    ; BUSACT1: Bus Active Control Bit (BUSCON1.10):
    _BUSACT1 EQU    1       ; = 0 external (ADDRSEL1) bus disabled
                            ; = 1 external (ADDRSEL1) bus enabled
    ;
    ; RDYEN1: READY# Input Enable control bit (BUSCON1.12):
    _RDYEN1  EQU    0       ; 0 = READY# function disabled
    ;                       ; 1 = READY# function enabled
    ;
    ;------------------------------------------------------------------------------
    

Reply
  • You want this startup.a66 file?

     ;------------------------------------------------------------------------------
    ;
    ; Definitions for SYSCON Register (System Configuration):
    ; -------------------------------------------------------
    ;
    ; MCTC: Memory Cycle Time (SYSCON.0 .. SYSCON.3):
    ; Note: if RDYEN == 1 a maximum number of 7 waitstates can be selected
    _MCTC   EQU     1       ; Memory wait states is 1 (MCTC = 0EH).
    ;                       ; (Reset Value = 15 additional state times)
    ;
    ; RWDC: Read/Write Signal Delay (SYSCON.4):
    _RWDC   EQU     0       ; 0 = Delay Time     0.5 States (Reset Value)
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; MTTC: Memory Tri-state Time (SYSCON.5):
    _MTTC   EQU     1       ; 0 = Delay Time     0.5 States (Reset Value)
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; BTYP_ENABLE: Enable External Bus Configuration Control Bits
    ; --- Set BTYP_ENABLE = 1 to allow modification of BTYP and BUSACT field
    ;                         in the SYSCON register.
    $SET (BTYP_ENABLE = 0)
    ;
    ; BTYP: External Bus Configuration Control (SYSCON.7 .. SYSCON.6):
    ; Note: These bits are only valid if _BUSACT == 1.
    _BTYP   EQU     0       ; 0 = 8 Bit Non Multiplexed
    ;                       ; 1 = 8 Bit Multiplexed
    ;                       ; 2 = 16 Bit Multiplexed
    ;                       ; 3 = 16 Bit Non Multiplexed
    ;
    ; CLKEN: System Clock Output Enable bit (SYSCON.8):
    _CLKEN  EQU     0       ; 0 = disabled    (Reset Value)
    ;                       ; 1 = enabled
    ;
    ; BYTDIS: Byte High Enable pin control bit (SYSCON.9):
    _BYTDIS EQU     0       ; 0 = enabled     (Reset Value)
    ;                       ; 1 = disabled
    ;
    ; BUSACT: Bus Active Control Bit (SYSCON.10):
    _BUSACT EQU     1       ; 0 = disabled
    ;                       ; 1 = enabled     (Reset Value)
    ;
    ; SGTDIS: Segmentation Disable control bit (SYSCON.11):
    $IF TINY
    _SGTDIS EQU     1       ; disable segmented mode for TINY model
    $ELSE
    _SGTDIS EQU     0       ; enable segmented mode (Reset Value)
    $ENDIF
    ;
    ; RDYEN: READY# Input Enable control bit (SYSCON.12):
    _RDYEN  EQU     0       ; 0 = disabled    (Reset Value)
    ;                       ; 1 = enabled
    ;
    ; RDY_AS: Synchronous / Asynchronous READY# Input (SYSCON.3):
    ; Note: This bit is only valid if _RDYEN == 1.
    _RDY_AS EQU     0       ; 0 = synchronous READY# input
    ;                       ; 1 = asynchronous READY# input
    ;
    ; STKSZ: Maximum System Stack Size selection  (SYSCON.13 .. SYSCON.14)
    ;  Defines the system stack space which is used by CALL/RET and PUSH/POP
    ;  instructions.  The system stack space must be adjusted according the
    ;  actual requirements of the application.
    $SET (STK_SIZE = 0)
    ;     System stack sizes:
    ;       0 = 256 words (Reset Value)
    ;       1 = 128 words
    ;       2 =  64 words
    ;       3 =  32 words
    ;       4 = not implemented
    ;       5 = not implemented
    ;       6 = not implemented
    ;       7 = size adjustable (up to 512 bytes in on-chip RAM, start at 0FA00H)
    ; If you have selected 7 for STK_SIZE, you can set the actual system stack size
    ; with the following SSTSZ statement.
    SSTSZ   EQU     200H    ; set System Stack Size to 200H Bytes
    ;
    ; USTSZ: User Stack Size Definition
    ;  Defines the user stack space available for automatics.  This stack space is
    ;  accessed by R0.  The user stack space must be adjusted according the actual
    ;  requirements of the application.
    USTSZ   EQU     1000H   ; set User Stack Size to 1000H Bytes.
    ;
    ; EXT_RAM: External RAM Write Access Enable (P3.13 = WR-Pin)
    ; --- Remove following statement if no external RAM is used
    $SET (EXT_RAM)
    ;
    ; WATCHDOG: Disable Hardware Watchdog
    ; --- Set WATCHDOG = 1 to enable the Hardware watchdog
    $SET (WATCHDOG = 0)
    ;
    ;
    ; CLR_MEMORY: Disable Memory Zero Initialization of RAM area
    ; --- Set CLR_MEMORY = 0 to disable memory zero initilization
    $SET (CLR_MEMORY = 1)
    ;
    ; INIT_VARS: Disable Variable Initilization
    ; --- Set INIT_VARS = 0 to disable variable initilization
    $SET (INIT_VARS = 1)
    ;
    ; DPPUSE:  Re-assign DPP registers
    ; --- Set DPPUSE = 0 to reduce the code size of the startup code, if you
    ;                    are not using the L166 DPPUSE directive.
    $SET (DPPUSE = 1)
    ;
    ;------------------------------------------------------------------------------
    ;
    ; BUSCON1/ADDRSEL1 Initialization
    ; ===============================
    ;
    ;
    ; BUSCON1/ADDRSEL1
    ; --- Set BUSCON1 = 1 to initialize the BUSCON1/ADDRSEL1 registers
    
    
    ;  CHANGED from 0
    
    
    $SET (BUSCON1 = 1)
    ;
    ; Define the start address and the address range.
    ; These values are used to set the ADDRSEL1 register
    %DEFINE (ADDRESS1) (20000H)      ; Set CS1# Start Address (default 20000H)
    %DEFINE (RANGE1)   (128K)        ; Set CS1# Range (default 128K)
    ;
    ; MCTC1: Memory Cycle Time (BUSCON1.0 .. BUSCON1.3):
    ; Note: if RDYEN1 == 1 a maximum number of 7 waitstates can be selected
    _MCTC1   EQU    1       ; Memory wait states is 1 (MCTC1 field = 0EH).
    ;
    ; RWDC1: Read/Write Signal Delay (BUSCON1.4):
    _RWDC1   EQU    0       ; 0 = Delay Time     0.5 States
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; MTTC1: Memory Tri-state Time (BUSCON1.5):
    _MTTC1   EQU    1       ; 0 = Delay Time     0.5 States
    ;                       ; 1 = No Delay Time  0   States
    ;
    ; BTYP1: External Bus Configuration Control (BUSCON1.6 .. BUSCON1.7):
    _BTYP1   EQU    0       ; 0 = 8 Bit Non Multiplexed
    ;                       ; 1 = 8 Bit Multiplexed
    ;                       ; 2 = 16 Bit Multiplexed
    ;                       ; 3 = 16 Bit Non Multiplexed
    ;
    ; ALECTL1: ALE Lengthening Control Bit (BUSCON1.9):
    _ALECTL1 EQU    0       ; see data sheet for description
    ;
    ; BUSACT1: Bus Active Control Bit (BUSCON1.10):
    _BUSACT1 EQU    1       ; = 0 external (ADDRSEL1) bus disabled
                            ; = 1 external (ADDRSEL1) bus enabled
    ;
    ; RDYEN1: READY# Input Enable control bit (BUSCON1.12):
    _RDYEN1  EQU    0       ; 0 = READY# function disabled
    ;                       ; 1 = READY# function enabled
    ;
    ;------------------------------------------------------------------------------
    

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