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Why Keil C51 V7.50 Compliler XBYTE as Such Result?

/*
****************************************************************************************************
* Filename : MAIN.c
* Hardware : Philips P89C51RA2BN + M5M81C55P-2 + SN74HC138
* Software : Keil uVision3 (C51 Compiler V7.50)
****************************************************************************************************
*/
/*
********************************************************************************
* Hardware Schematic Illustration
* ----------- -----------
* | | | |
* | |/-------------------------------------\| |
* | P0|\-------------------------------------/|AD0..AD7 |
* | ALE|-------------------------------------->|ALE |
* | \RD|-------------------------------------->|\RD |
* | \WR|-------------------------------------->|\WR |
* | P1.0|-------------------------------------->|RESET |
* | | | |
* | P89C51RA2 | | M5M81C55 |
* | | | |
* | P2.0|-------------------------------------->|IO/M |
* | | _______ | |
* | P2.1|---------->|A Y0|------------------>|\CE |
* | P2.2|---------->|B | | |
* | | ------|C | | |
* | | | | HC138 | | |
* | | | 5V|--|G1 | | |
* | | | | | | |
* | | |------|G2B | | |
* | | |------|G2A | | |
* |___________| ----- |_______| |___________|
* ---
* -
*-------------------------------------------------------------------------------
* External data space design:
* I/O space ----- 0x0100 - 0x0105
* Memory space ----- 0x0000 - 0x00ff
********************************************************************************
*/

/*
********************************************************************************
* Include Top-level Head File
********************************************************************************
*/
#include <reg51f.h> /* Device specific head file */
#include <absacc.h> /* Absolute memory access */
#include "..\..\COMMON\TYPEDEF.h" /* Data type redefinition */

/*
********************************************************************************
* Variables Definition
********************************************************************************
*/
sbit RST_81C55 = P1^0;

/*
********************************************************************************
* 81C55 I/O Space Definition
********************************************************************************
*/

#define INTERNAL_CMD_STAT_81C55 (XBYTE[0x0100])
#define PA_81C55 (XBYTE[0x0101])
#define PB_81C55 (XBYTE[0x0102])
#define PC_81C55 (XBYTE[0x0103])
#define TIMER_LSB_81C55 (XBYTE[0x0104])
#define TIMER_MSB_81C55 (XBYTE[0x0105])

/*
********************************************************************************
* Functions Declaration
********************************************************************************
*/
extern void TimeDly (INT16U);

/*
********************************************************************************
* Main Function
********************************************************************************
*/
void main (void)
{
INT8U i;

RST_81C55 = 1;
TimeDly(5);
RST_81C55 = 0;

AUXR |= 0x02; /* Enable off-chip memory access */
/* If target device is standard 89C52, comment out the line above */

/*----- Init 81C55 -----*/
INTERNAL_CMD_STAT_81C55 = 0x01; /* Set 81C55 PA output and PB input */

for (i = 0; i < 3; i++) {
PA_81C55 = 0xff;
TimeDly(1000);
PA_81C55 = 0x00;
TimeDly(1000);
};


/*----- Disassembly code of bold source code above -----*/
C:0x0011 900100 MOV DPTR,#0x0100
C:0x0014 7401 MOV A,#0x01
C:0x0016 F0 MOVX @DPTR,A
116: for (i = 0; i < 3; i++) {
C:0x0017 E4 CLR A
C:0x0018 F508 MOV 0x08,A
117: PA_81C55 = 0xff;
C:0x001A 74FF MOV A,#0xFF why set ACC 0xff, not the external data space 0x0101
118: TimeDly(1000);
C:0x001C 120035 LCALL L?0015(C:0035)
119: PA_81C55 = 0x00;
C:0x001F E4 CLR A
120: TimeDly(1000);
C:0x0020 120035 LCALL L?0015(C:0035)

while (1) {
PA_81C55 = PB_81C55;
TimeDly(1000);
}

}

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