To assure error randomness, errors due to the channel are simulated by an LFSR based random generator. For each frame generated at the transmitter, a 16 bit random number is generated and the errors are inserted as shown below. If bit E is set to 1 then locate the byte at the position indicated by the 7 Position Bits, and XOR the two consecutive bytes at that location by the bit pattern indicated in the field Error Bits. The frame, made up of the preamble the length field the data field and the FCS is then transmitted through the serial port to the other station. The receiving station will then check first for the preamble, if it receives the correct sequence of bits it will then start reading the consequent bytes until it has read all the bytes of the data field indicated by the length and the two-byte FCS. To check for the occurrence of errors, the received frame (data field and FCS) is divided by the polynomial generator. If the remainder is zero, the frame is then accepted otherwise an error is reported, by displaying a message on the screen. Does anybody has some assembly code for this problem?!!!
"Does anybody has some assembly code for this problem?!!! " Don't start a new Thread on exactly the same subject: http://www.keil.com/forum/docs/thread6028.asp You have simply typed the text of your homework assignment verbatim, haven't you? Surely, the whole point is that you need to understand how this CRC checking business works? You really need to get down to your college library and do some reading! And see the site I mentioned in your previous thread - it explains all about how CRCs work: http://www.repairfaq.org/filipg/LINK/F_crc_v3.html