I am working with a Cypress CY7C64613 and am trying to debug my system by using Cypress's internal version of Mon-51 (mon-int-sio0.hex). I can get the system up an running, set my breakpoint at the beginning of my ISR, pass data to the chip causing an interrupt and program execution to stop at my breakpoint, and use the Keil Debugger to manually step through each line of assembly of my ISR without any errors. When I try this same scenario but, after hitting the ISR breakpoint, I press either the "Step Over" or "Run" key on the Keil Debugger, I loose contact with the Mon-51 program. I am still able to send the uC data and it appears as though my application is still running, but I've lost the monitor connection, which I need for debug. I've been looking at this problem for quit some time now and the only thing I can find is that the internal RAM of the 8051 core (of the Cypress uC) is being corrupted. I've compared the map (.M51) files of the monitor program and made sure that my application's CODE and XDATA segments are mutually exclusive to each other and do not overlap the monitor's CODE and XDATA spaces. However, I cannot get the internal DATA memory to be non-overlapping. Specifically, I can't get the Register Banks to read other than "REG BANK 0" for both programs. The .M51 map file for the monitor's internal RAM reads: TYPE BASE LENGTH RELOCATION SEGMENTNAME --------------------------------------------- * * * D A T A M E M O R Y * * * REG 0000H 0008H ABSOLUTE "REG BANK 0" IDATA 0008H 001AH UNIT STACK BIT 0022H.0 0000H.3 UNIT BIT_AREA 0022H.3 0000H.5 *** GAP *** DATA 0023H 0019H UNIT DATA_AREA Using the UV2-Options-BL51 Locate tab, in the Base column, I've entered the BIT base to 0x40, the DATA base to 0x40, and the IDATA base to 0x80, which produces the following .M51 map file DATA MEMORY: TYPE BASE LENGTH RELOCATION SEGMENTNAME --------------------------------------------- * * * D A T A M E M O R Y * * * REG 0000H 0008H ABSOLUTE "REG BANK 0" 0008H 0020H *** GAP *** BIT 0028H.0 0000H.4 UNIT ?BI?MYPRJ BIT 0028H.4 0000H.1 UNIT _BIT_GROUP_ 0028H.5 0017H.3 *** GAP *** DATA 0040H 001DH UNIT _DATA_GROUP DATA 005DH 0011H UNIT ?DT?MYPRJ1 DATA 006EH 0006H UNIT ?DT?MYPRJ2 IDATA 0074H 0001H UNIT ?STACK It appears to me that the BIT and DATA segments are being placed where I want them, but why is my IDATA ?STACK at 0074 and not at 0080H? Why does the map file only show one byte for my STACK when I know it needs more space than that (and the monitor program's STACK is set at 001AH). How do I get my application to use one of the other three other Register Banks instead of "REG BANK 0"? Also, what does UNIT mean under the RELOCATION column in the map file? I am thinking that there is not enough space being reserved on the stack and/or the both applications are using the same register bank. I have also noticed when manually stepping through my ISR that the stack pointer value crosses the 0x80. Since the stack is accessed via indirect addressing, this should not mess up any of the Cypress SFP's, but ANY thought/ideas/comments are welcomed at this point. Thanks. John