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Hello, Program which can earse the entire on-chip flash must run from internal RAM. In my project design, the erase code resides in a known location of Flash. At certain point of execution I need to transfer that block of code to internal RAM, so that the erase procedure can carry on. Will anyone please help me in writing the code / give me some information as how to go ahead with this. Thanks and regards Rashmi
To transfer 1 byte, it'll take the amount of time to READ the byte from the FLASH and WRITE it to the RAM. You can check the data sheet to find this information out. Jon
If I remember right, IRAM has the worst opcode fetch times of all memory, by far. Internal xram is similar to external ram (16-bit bus with 0 wait states) and internal flash is by far the fastest since it has no wait states and fetches are done 32-bits at a time. You should be able to find the actual timings in the data sheets. Best Scott
Hi Scott, I don't think that 'by far' is the right expression. IRAM and XRAM use 16-bit demultiplexed access without extra delays, which is FAST. On-chip flash can use 32-bit reads for instruction fetches, so 4-byte instructions are fetched in 1 read cycle. That's the only difference timewise. Because of this, typical code execution from on-chip flash ROM is about 20% faster than from IRAM or XRAM, according to 'The Insider's Guide To Planning 166 Family Designs' from Hitex. Regards, - mike
Mike, IRAM is fast for operand storage but is much slower for op-code fetches (maybe an artifact of the '51 archecture). I can't find the documentation which had a concise table of timing based on memory location (either from Infineon or ST). However, the ST-10 programming manual lists the timing of op-codes based on flash/iram and external ram with various bus configurations. Example:
Instructuion - ADDC Rb, Rb Memory Cycles Int Flash 2 Int RAM 6 Ext Mem*- 16-bit non-mux 2 Ext Mem*- 16-bit mux 3 Ext Mem*- 8-bit non-mux 4 Ext Mem*- 8-bit mux 6 *Assumes no wait states.
Thanks Scott, Now I understand I was wrong. For some reason I assumed that since IRAM is accessed via 16-bit bus, it must be fast. - mike