Hello, Program which can earse the entire on-chip flash must run from internal RAM. In my project design, the erase code resides in a known location of Flash. At certain point of execution I need to transfer that block of code to internal RAM, so that the erase procedure can carry on. Will anyone please help me in writing the code / give me some information as how to go ahead with this. Thanks and regards Rashmi
Mike, IRAM is fast for operand storage but is much slower for op-code fetches (maybe an artifact of the '51 archecture). I can't find the documentation which had a concise table of timing based on memory location (either from Infineon or ST). However, the ST-10 programming manual lists the timing of op-codes based on flash/iram and external ram with various bus configurations. Example:
Instructuion - ADDC Rb, Rb Memory Cycles Int Flash 2 Int RAM 6 Ext Mem*- 16-bit non-mux 2 Ext Mem*- 16-bit mux 3 Ext Mem*- 8-bit non-mux 4 Ext Mem*- 8-bit mux 6 *Assumes no wait states.
Thanks Scott, Now I understand I was wrong. For some reason I assumed that since IRAM is accessed via 16-bit bus, it must be fast. - mike