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Dual DPTR push in ISR - why?

Tony Karavidas

I'm looking to optimize an ISR written in C and wondered why version 6.21 pushes both DPTR when it doesn't use them both?

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  • 0 in reply to Tony Karavidas

    I have a good contact at Cypress and he was one of the people that developed the EZUSB 8051 based devices. He told me (for the record):

    "I believe it's safe, since the "INC DPS" technique is recommended in the Dallas literature (Dallas invented the 4-clock cycle 8051 and added the second data pointer). The Synopsys 8051 core we used in EZ-USB is based on the Dallas architecture."

    So I guess my fears are put to rest!

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  • 0 in reply to Tony Karavidas

    I have a good contact at Cypress and he was one of the people that developed the EZUSB 8051 based devices. He told me (for the record):

    "I believe it's safe, since the "INC DPS" technique is recommended in the Dallas literature (Dallas invented the 4-clock cycle 8051 and added the second data pointer). The Synopsys 8051 core we used in EZ-USB is based on the Dallas architecture."

    So I guess my fears are put to rest!

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