This is a general question, i'm used to using PIC's, and AVR's and not really 8051's. Do most people set the interrupts to another bank with 'using' and leave the rest of the code with the default. Just after some experienced users guidelines. Also we have an 8051 ASIC with 128k code and ram, 2 SPI's etc. I was looking at defining the resources so the compiler knows about this stuff. I'm a little confused about how the compiler would treat it. ie the 128k data is internal to the ASIC but does the compiler still have to treat it as external? thanks David
You don't have to restrict yourself to just three interrupt priorities - although it may make thinks simpler if you do. If you do have more than three interrupt priorities the "top" three can make use of register banks 1, 2 and 3 by means of the using keyword. Any lower priority interrupts should not use the using keyword - these interrupts save the current register bank selection on the stack and set the current register bank to 0. Registers from bank 0 are saved on the stack as necessary. On exit, the interrupt will pop the register values from the stack (restoring bank 0 registers to their original values) and then switch to the original register bank before RETI. Saving registers on the stack and restoring them on exit is generally going to take longer than simply switching register banks. When allocating register banks for maximum efficiency, give thought to the priority of interrupts and how many registers that interrupt is likely to use.
Thanks everyone for some good comments. So any interrupts that i need fast responses to go into the banks with using command. Thats an interesting feature as other processors i've tried just use the stack. David
Not quite, once you use a register bank for an ISR at a given priority, use it for all ISR's at that same priority. Unless you manually nest interrupts, interrupts at the same priority are mutually exclusive and can safely share register banks with free abandon. The 8051 is stack based, but only for return addresses. Keil C51 is usually used in non-reentrant mode but if you enable reentrancy, you will have a stack based machine again. The reentrant stack can be in XDATA for reasonable stack depths. This type of "stack" is more common to RISC processors which use a compiler convention for the software stack frame. - Mark
Why does the same level priority interrupt have to be in the same bank. What is different between them that we cannot mix them? thanks David
Mark didn't say that you must use the same bank; he said you can safely use the same bank - so you don't need to "waste" extra banks on same-priority interrupts which can share (with the nesting proviso)