8051 Interrupts

Grab the Intel MCS-51 Family User's Manual from their website and read the interrupts section.

Then, simply declare all your shared ISR/Backround variables (if any) as volatile, use a separate register bank for all ISR's at the same hardware priority if you want consistent latency independent of how many registers your ISR uses, don't call library code from the ISR, and remember that some interrupts are ack'd by vectoring while some require an explicit ack. ISR's just look like this:

void uartIsr(void) interrupt UART_VECTOR using REG_BANK_1
{
   // code 
}

The compiler will insert the proper prologue/epilogue and insert this function's address at the UART_VECTOR address with a LJMP (maybe AJMP).

Pretty easy. You get the UART_VECTOR address from the data book for your chip and the register banks are 0, 1, 2, and 3. Bank 0 is always used by the background (main loop) and ISR's unless you use the using keyword.

- Mark