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Cortex-R5F SIMD Instruction Set

Daniel A.

Hi,

I'm working with the Cortex-R5F, trying to utilize their SIMD instruction capabilities.
I am using GNU armr5-none-eabi-gcc compiler, and have not been able to find code that maps to the SIMD specific assembly code instructions.
Instead the compiler maps to the Vector Floating Point instructions.


Is it the case that the Vector instruction set is a form of SIMD instructions?
Is it possible for to me compare the performance of these R5 SIMD instructions vs the current Vector Floating Point instructions?


My current setup, is 2 pre-initialized arrays of Float running through a for loop, where they are multiplied together and added in an accumulator.
I've tried changing the compilers optimization levels, with no luck of finding these SIMD instructions being used.
I also tried playing with the for loop's design by changing the increment size, such that I do  4/16/32 operations before the next iteration occurs, again with no luck.


I'm hoping for any advice on how to get the compiler to map to the R5 SIMD specific instructions as found by the ID_ISAR3 register:

https://developer.arm.com/documentation/ddi0460/d/System-Control/Register-descriptions/Instruction-Set-Attributes-Registers?lang=en

Thanks,
DA