LD_RETIRED , ST_RETIRED Events not working

Hi,

I am tyring to get load count , store count and instrucion count  in AArch64 DS-5 by using ARM64 PMU Events LD_RETIRED , ST_RETIRED and INST_RETIRED.

I am able to get instruction count , but not load and store count, please find the code and enums i used to enable these events below,

events:  (Reference : ARM Documents)

LD_RETIRED = 0x06,
ST_RETIRED = 0x07,
INST_RETIRED = 0x08

Code:   

  /*

     x0 = counter number ( ex: 0 , 1 and 2)

      x1 =  event number (ex: 0x06, 0x07 and 0x08)  

*/

pmn_config:  
          AND x0, x0, #0x1F                        // Mask to leave only bits 4:0
          MSR PMSELR_EL0, x0                    // Write PMSELR Register
          ISB                                                // Synchronize context
          MSR PMXEVTYPER_EL0 , x1            // Write PMXEVTYPER Register
          BR lr

   /*  x0 = counter number ( ex: 0 , 1 and 2)  */

enable_pmn:
          MOV x1, #0x1
          LSL x1, x1, x0
          MSR PMCNTENSET_EL0 , x1              // Write PMCNTENSET Register
          BR  lr

For enabling events load and store ( LD_RETIRED , ST_RETIRED), is there anything wrong in the above code.

Please correct me if I am doing or analyzing anything wrong. Please give reference any code or document if you find any for this.

Thanks in Advance,

Divya.