MPS3 board FPGA PLL access from vivado. No information on PLL package pin. Help?


I need to use the ARM MPS3 FPGA prototyping board for an emulation. In the project, I need only to use the FPGA via JTAG for my implementation. I am planning to see the input-output via Vio and ila. However, in the i/o planning phase, the auto-assignment put the clock pin to AM21 and LVCMOS 18. Even though it generated the bitstream, the design doesn't work for the hardware manager. It says in the TCL console that the clock needs to be free-running and be sure that it is activated. It is not getting any debug core or ila core. I am not sure the clock comes form the AM21 pin from the FPGA pin configuration. Also, there is a lack of documentation on pin no and clock connections. Did any of you face the same problem? How did you figure out the solution?

Any help would be highly appreciated. Also, please let me know if you need any more information.