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GIC 400: Pending interrupt not served by the core


I am using GIC400 in our project

I am trying to generate interrupt using 2 methods (Configured the SPI 33 interrupt to level trigger)

1) Using write into a pending register(GICD_ISPENDR[1]=0x2)

    --> interrupt is generated properly. IRQ handler is also called. Working properly

2) External interrupt 

     --> HW generates an interrupt and pending bit set but the core does not serve that interrupt

But when I do the below step then external interrupt received

1) Writing pending register

2) Trigger interrupt from HW

Here interrupt received every time. but need to write pending register at least one time is necessary. 

Did I miss something? Why behavior is different ? Please help me to debug this(Note : using Aarch64 environment)