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How to understand Device-nGRE?

ocean

Hi, experts,

Re-Orderingis a new attribute in ARMv8.

Can you explain Device-nGRE, and How to distinguish Device-nGRE and Device-nGnRE?

Thanks.

  • 0 Arm Employee Badge

    Hello,

    The three device attributes are G, R, and E, with the following definitions:

    • Gathering (G/nG)
      - Determines whether multiple accesses can be merged into a single bus transaction
      - nG: Number/size of accesses on the bus = number/size of accesses in code
    • Reordering (R/nR)
      - Determines whether accesses to the same device can be reordered
      - nR: Accesses to the same IMPLEMENTATION DEFINED block size will appear on the bus in program order
    • Early Write Acknowledgement (E/nE)
      - Indicates to the memory system whether a buffer can send acknowledgements
      - nE: The response should come from the end slave, not buffering in the interconnect

    So with the above said:

    • Device-nGRE is device memory where Reordering and Early Write Acknowledgements are allowed, but multiple accesses cannot be merged into a single bus transaction
    • Device-nGnRE is device memory where Early Write Acknowledgements are allowed, but multiple accesses cannot be merged into a single bus transaction, and accesses to the same IMPLEMENTATION DEFINED block size will appear on the bus in program order

    I hope that helps,

    Ash.

  • 0 in reply to Ash Wilding

    Hi Ash,

    in the case of Device-nGnRE, what does IMPLEMENTATION DEFINED block size means?

    Is it related to (according to the Armv8 architecture specification)

    A Memory-mapped peripheral occupies a memory region of IMPLEMENTATION DEFINED size and
    can be accessed using load and store instructions.

     

    My misunderstanding comes from the Armv7a specification which states:

     

    in A3.8.2 Ordering requirements for memory accesses:

    The size of a memory mapped peripheral, or a block of memory, is IMPLEMENTATION DEFINED, but is not smaller
    than 1KByte.

    Note: This implies that the maximum memory-mapped peripheral size for which the architecture guarantees order for all
    implementations is 1KB.

     

    If the pheriperal has a memory map greater than 1KB, the Armv7 architecture doesn't guarantee ordering? If true, does the same limitation

    exist for Armv8, for the Device-nGnRE? 

     

    Bas