Hello,
I'm developing a Baremetal application running on ARM Cortex A35 (ARMv8).
I have succeeded to enable the Caches and MMU in EL-1.
My questions are:
1. Can I enable the MMU and invalidate and enable the Caches in EL-2 without enabling them in EL-1?
2. How can I switch from EL-1 to EL-2?
Thank you.
Hi Eladouly,
Yes. MMU enable for EL2 is controlled by SCTLR_EL2, while EL1 is controlled by SCTLR_EL1
https://developer.arm.com/docs/den0024/latest/the-memory-management-unit/translations-at-el2-and-el3
• Hypervisor Call (HVC) exception.• Traps to EL2, EL2 configurable controls, can take physical IRQ to EL2, trap system register access to EL2, cache maintenance instructions to EL2...• virtual interrupts
For details you can ref D1.5 Virtualization in ARM architecture reference mannual
https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf?_ga=2.144672883.796613316.1539566896-2134523402.1525336476