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R_AARCH64_ADR_PREL_PG_HI21

LiorW over 3 years ago

Hi,

I have added a new platform into TrustedFirmware-A which is based on a single A53 core.
Currently, only compiling BL1 and when the secure ROM and SRAM sections are located on the same 4GB space it compiles and link OK:

#define SEC_ROM_BASE 0x00000000

#define SEC_SRAM_BASE 0x0e000000

When the secure ROM and SRAM base addresses are separated with a larger gap (>4GB) then I am getting the following error:

#define SEC_ROM_BASE 0xD800000000

#define SEC_SRAM_BASE 0xC000000000

(.text.asm.bl1_entrypoint+0x90): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against symbol `__BSS_START__' defined in .bss section in bl1.elf

So my question is:
Is that a real limitation of the compiler (or A53) or is there a way to workaround it with some compiler switches or build macros on the TrustedFirmware build?

I am building the TrustedFirmware on Ubuntu 18.04 with cross compiler from Linaro

arm-gnu-toolchain-11.3.rel1-x86_64-aarch64-none-elf

Thanks,

Lior.