MDK ARM Keil Compiler Flash Memory Setting

Hi sir,

Thank you again for your help,

Here I attached the Scatter File and also Map File.

The WARNING is highlighted in figure below.

; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************

LR_IROM1 0x08000000 0x00006000  {    ; load region size_region
  ER_IROM1 0x08000000 0x00006000  {  ; load address = execution address
   ;*.o (RESET, +First)
   ;*(InRoot$$Sections)
   ;startup_stm32l051xx.o (+RO)
	;Bootloader.o (+RO)
    ;dualop_flash.o (+RO)
    ;boot_eeprom.o (+RO)
	;boot_cc1101.o (+RO)
	;boot_CRC.o (+RO)
	;boot_stm32l0xx_it.o (+RO)
	;main_function.o (+RO)
	;Bootloader_Hex.o (+RO)
   ;.ANY (+RO)
  }
  ;RW_IRAM1 0x20000000 0x00002000  {  ; RW data
  ; .ANY (+RW +ZI)
  ;}
}

;LR_IROM2 0x08003000 0x00003000  {
 ; ER_IROM2 0x08003000 0x00003000  {  ; load address = execution address
  ;  stm32l0xx_nucleo.o (+RO)
   ; system_stm32l0xx.o (+RO)
  ;  stm32l0xx_hal.o (+RO)
   ; stm32l0xx_hal_adc.o (+RO)
	;stm32l0xx_hal_adc_ex.o (+RO)
    ;stm32l0xx_hal_cortex.o (+RO)
    ;stm32l0xx_hal_dma.o (+RO)
    ;stm32l0xx_hal_flash.o (+RO)
    ;stm32l0xx_hal_flash_ex.o (+RO)
    ;stm32l0xx_hal_gpio.o (+RO)
    ;stm32l0xx_hal_pwr.o (+RO)
    ;stm32l0xx_hal_pwr_ex.o (+RO)
    ;stm32l0xx_hal_rcc.o (+RO)
    ;stm32l0xx_hal_rcc_ex.o (+RO)
    ;stm32l0xx_hal_spi.o (+RO)
    ;stm32l0xx_hal_tim.o (+RO)
    ;stm32l0xx_hal_i2c.o (+RO)
	;stm32l0xx_hal_wwdg.o (+RO)
	;stm32l0xx_hal_iwdg.o (+RO)
   ;.ANY (+RO)
  ;}
;}

; user code vertor start from 0x08006000 - 0x080067FF -------------------------------------
LR_IROM5 0x08006500 0x00000010  {
  ER_IROM5 0x08006500 0x00000010  {  ; load address = execution address
	Vectors.o (system_tick)
  } 
}

LR_IROM6 0x08006510 0x00000010  {
  ER_IROM6 0x08006510 0x00000010  {  ; load address = execution address
	Vectors.o (NIM)
  }
}

LR_IROM7 0x08006520 0x00000010  {
  ER_IROM7 0x08006520 0x00000010  {  ; load address = execution address
	Vectors.o (hard_fault)
  }
}

LR_IROM8 0x08006530 0x00000010  {
  ER_IROM8 0x08006530 0x00000010  {  ; load address = execution address
	Vectors.o (SVC1)
  }
}

LR_IROM9 0x08006540 0x00000010  {
  ER_IROM9 0x08006540 0x00000010  {  ; load address = execution address
	Vectors.o (debug_Mon)
 }
}

LR_IROM10 0x08006550 0x00000010  {
  ER_IROM10 0x08006550 0x00000010  {  ; load address = execution address
	Vectors.o (pen_SV)
  }
}

LR_IROM11 0x08006560 0x00000010  {
  ER_IROM11 0x08006560 0x00000010  {  ; load address = execution address
	Vectors.o (WWDG_IRQ)
  } 
}

LR_IROM12 0x08006570 0x00000010  {
  ER_IROM12 0x08006570 0x00000010  {  ; load address = execution address
	Vectors.o (PVD_IRQ)
  }
}

LR_IROM13 0x08006580 0x00000010  {
  ER_IROM13 0x08006580 0x00000010  {  ; load address = execution address
	Vectors.o (RTC_IRQ)
  }
}

LR_IROM14 0x08006590 0x00000010  {
  ER_IROM14 0x08006590 0x00000010  {  ; load address = execution address
	Vectors.o (Flash_IRQ)
  }
}

LR_IROM15 0x080065A0 0x00000010  {
  ER_IROM15 0x080065A0 0x00000010  {  ; load address = execution address
	Vectors.o (RCC_CRS_IRQ)
 }
}

LR_IROM16 0x080065B0 0x00000010  {
  ER_IROM16 0x080065B0 0x00000010  {  ; load address = execution address
	Vectors.o (EXTI0_1_IRQ)
  }
}

LR_IROM17 0x080065C0 0x00000010  {
  ER_IROM17 0x080065C0 0x00000010  {  ; load address = execution address
	Vectors.o (EXTI2_3_IRQ)
  } 
}

LR_IROM18 0x080065D0 0x00000010  {
  ER_IROM18 0x080065D0 0x00000010  {  ; load address = execution address
	Vectors.o (EXTI4_15_IRQ)
  }
}

LR_IROM19 0x080065E0 0x00000010  {
  ER_IROM19 0x080065E0 0x00000010  {  ; load address = execution address
	Vectors.o (TSC_IRQ)
  }
}

LR_IROM20 0x080065F0 0x00000010  {
  ER_IROM20 0x080065F0 0x00000010  {  ; load address = execution address
	Vectors.o (DMA1_Channel1_IRQ)
  }
}

LR_IROM21 0x08006600 0x00000010  {
  ER_IROM21 0x08006600 0x00000010  {  ; load address = execution address
	Vectors.o (DMA1_Channel2_3_IRQ)
 }
}

LR_IROM22 0x08006610 0x00000010  {
  ER_IROM22 0x08006610 0x00000010  {  ; load address = execution address
	Vectors.o (DMA1_Channel4_5_6_7_IRQ)
  }
}

LR_IROM23 0x08006620 0x00000010  {
  ER_IROM23 0x08006620 0x00000010  {  ; load address = execution address
	Vectors.o (ADC1_COMP_IRQ)
  } 
}

LR_IROM24 0x08006630 0x00000010  {
  ER_IROM24 0x08006630 0x00000010  {  ; load address = execution address
	Vectors.o (LPTIM1_IRQ)
  }
}

LR_IROM25 0x08006640 0x00000010  {
  ER_IROM25 0x08006640 0x00000010  {  ; load address = execution address
	Vectors.o (TIM2_IRQ)
  }
}

LR_IROM26 0x08006650 0x00000010  {
  ER_IROM26 0x08006650 0x00000010  {  ; load address = execution address
	Vectors.o (TIM6_DAC_IRQ)
  }
}

LR_IROM27 0x08006660 0x00000010  {
  ER_IROM27 0x08006660 0x00000010  {  ; load address = execution address
	Vectors.o (TIM21_IRQ)
 }
}

LR_IROM28 0x08006670 0x00000010  {
  ER_IROM28 0x08006670 0x00000010  {  ; load address = execution address
	Vectors.o (TIM22_IRQ)
  }
}

LR_IROM29 0x08006680 0x00000010  {
  ER_IROM29 0x08006680 0x00000010  {  ; load address = execution address
	Vectors.o (I2C1_IRQ)
  }
}

LR_IROM30 0x08006690 0x00000010  {
  ER_IROM30 0x08006690 0x00000010  {  ; load address = execution address
	Vectors.o (I2C2_IRQ)
 }
}

LR_IROM31 0x080066A0 0x00000010  {
  ER_IROM31 0x080066A0 0x00000010  {  ; load address = execution address
	Vectors.o (SPI1_IRQ)
  }
}

LR_IROM32 0x080066B0 0x00000010  {
  ER_IROM32 0x080066B0 0x00000010  {  ; load address = execution address
	Vectors.o (SPI2_IRQ)
  } 
}

LR_IROM33 0x080066C0 0x00000010  {
  ER_IROM33 0x080066C0 0x00000010  {  ; load address = execution address
	Vectors.o (USART1_IRQ)
  }
}

LR_IROM34 0x080066D0 0x00000010  {
  ER_IROM34 0x080066D0 0x00000010  {  ; load address = execution address
	Vectors.o (USART2_IRQ)
  }
}

LR_IROM35 0x080066E0 0x00000010  {
  ER_IROM35 0x080066E0 0x00000010  {  ; load address = execution address
	Vectors.o (RNG_LPUART1_IRQ)
  }
}

LR_IROM36 0x080066F0 0x00000010  {
  ER_IROM36 0x080066F0 0x00000010  {  ; load address = execution address
	Vectors.o (LCD_IRQ)
 }
}

LR_IROM37 0x08006700 0x00000010  {
  ER_IROM37 0x08006700 0x00000010  {  ; load address = execution address
	Vectors.o (USB_IRQ)
  }
}

; all the other user code start from 0x08006600 - 0x0800FFFF ---------------------------------------
LR_IROM3 0x08006800 0x00000800  {
  ER_IROM3 0x08006800 0x00000800  {  ; load address = execution address
	*.o (RESET, +First)
    *(InRoot$$Sections)
    startup_stm32l051xx.o (+RO)
	;main.o (user_main_function)
   ;.ANY (+RO)
  }
}

;LR_IROM4 0x0800F000 0x00000800  {
;	ER_IROM4 0x0800F000 0x00000800  {
;	.ANY (+RO)
;	}
;}

LR_IROM2 0x08007000 0x00009000  {    ; load region size_region
  ER_IROM2 0x08007000 0x00009000  {  ; load address = execution address
    ;*.o (RESET, +First)
    ;*(InRoot$$Sections)
    ;startup_stm32l051xx.o (+RO)
    main.o (+RO)
    stm32l0xx_hal_msp.o (+RO)
    stm32l0xx_it.o (+RO)
    myrf.o (+RO)
    mycrc.o (+RO)
    eeprom.o (+RO)
    extender_sub.o (+RO)
	buzzer.o (+RO)
	Vectors.o (+RO)
	Vector1.o (+RO)
	;stm32l0xx_nucleo.o (+RO)
    system_stm32l0xx.o (+RO)
    stm32l0xx_hal.o (+RO)
    stm32l0xx_hal_adc.o (+RO)
	stm32l0xx_hal_adc_ex.o (+RO)
    stm32l0xx_hal_cortex.o (+RO)
    stm32l0xx_hal_dma.o (+RO)
    stm32l0xx_hal_flash.o (+RO)
    stm32l0xx_hal_flash_ex.o (+RO)
    stm32l0xx_hal_gpio.o (+RO)
    stm32l0xx_hal_pwr.o (+RO)
    stm32l0xx_hal_pwr_ex.o (+RO)
    stm32l0xx_hal_rcc.o (+RO)
    stm32l0xx_hal_rcc_ex.o (+RO)
    stm32l0xx_hal_spi.o (+RO)
    stm32l0xx_hal_tim.o (+RO)
    stm32l0xx_hal_i2c.o (+RO)
	stm32l0xx_hal_wwdg.o (+RO)
	stm32l0xx_hal_iwdg.o (+RO)
   .ANY (+RO)
  }
  RW_IRAM2 0x20000000 0x00001800  {  ; RW data
   .ANY (+RW +ZI)
  }
  RW_STACK 0x20001800 UNINIT ALIGN 2048       ; RW data - Stack 
  {
    *.o (Stack)
  }
}

Hi sir,

I am agree with your answer and I am going to understand the problem clearly.

Just want to make my self clear so that I would not misunderstanding your answer.

I decide to use the memory setting in the Scatter File. Thus, in Linker Tab, I should UNTICK the box "Use Memory Layout from Target Dialog" as shown in the attachment.

Then I should configure the Scatter File so that the compiler will use that Memory Setting.

I am using MCU STM32L073VB that have 128kByte Flash Memory and 20kByte RAM.

Thus, I should configure the Scatter File as following:

NAME            BASE        SIZE

ER_IROM2    0x0800 7000   0x0001 9000                  ==> 128 kByte Flash Memory

RW_IRAM2    0x2000 0000   0x0000 4800                  ==> 20 kByte RAM

RW_STACK   0x2000 4800    UNINIT ALIGN 2048

For more details, the Scatter File is attached.

Am I right?