I see the Cortext M23 has an ASIL D certificate. I cannot find the subsystem architecture that was used to meet this standard. For example was this a dual core with lockstep ?
The specific subsystem architecture that was used to achieve this certification will depend on the implementation of the Cortex-M23 by the individual silicon vendor. In general, Arm Cortex-M23 cores support lock-step operation, which is a technique used to improve the fault tolerance of a system by running two or more processors in parallel and comparing their outputs.
However, the specific subsystem architecture and safety measures that were used to achieve the ASIL D certification for the Cortex-M23 will likely be proprietary information, and would be provided by the specific silicon vendor.