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Calculating L1 hit latency and L2 hit latency

akshit dayal
Note: This was originally posted on 16th January 2012 at http://forums.arm.com

All,

I am new here. I was interested in measuring the L1 hit latency for A15/A9. Which signals do I need to probe inside the ARM RTL to figure that out.for

1) L1 hit only
2) Also I have a scenario where I generate a L1miss and L2 hit. I need to evaluate the cache latency for l2 hit in that scenario too. Again which signals should I probe inside  each ARM CPU to figure that out.

Thanks much,

Dmax
Parents
  • Note: This was originally posted on 17th January 2012 at http://forums.arm.com


    Assuming you can run Linux on the platform you are using, I'd recommend using LMBench - it can provide a nice set of data for latency and bandwidth for the various levels in the memory system.


    Iso,

    My problem is a that I am running on a compiled RTL using baremetal code i.e. I cannot run complex sw/linux. Thus I need observability in the RTL. I was able to figure out the "probable" L1 hit latency from the time the dispatch unit committed an instruction to the time the load actually occurred in one of the arch regs. This after the data was allocated in the L1 on a compulsory miss. However I am not sure if this would count as a L1hit latency.

    Let me know what you think.

    Thanks much.

    DMax
Reply
  • Note: This was originally posted on 17th January 2012 at http://forums.arm.com


    Assuming you can run Linux on the platform you are using, I'd recommend using LMBench - it can provide a nice set of data for latency and bandwidth for the various levels in the memory system.


    Iso,

    My problem is a that I am running on a compiled RTL using baremetal code i.e. I cannot run complex sw/linux. Thus I need observability in the RTL. I was able to figure out the "probable" L1 hit latency from the time the dispatch unit committed an instruction to the time the load actually occurred in one of the arch regs. This after the data was allocated in the L1 on a compulsory miss. However I am not sure if this would count as a L1hit latency.

    Let me know what you think.

    Thanks much.

    DMax
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