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cache maintenance on cortex-a8

Note: This was originally posted on 17th November 2011 at http://forums.arm.com

[size=2]Hi ARM experts,
I am a little confused about the cache maintenance on cortex-a8. Some understanding were listed as follow, if there is any error, please correct me.

1. If a word (0x55aa for example)is written to a memory space(address A) which is write-back and write-allocate and a cache miss occurred, then [/size]
   1) if there is no clean cache line, a certain cache line will be flush to main memory and then marked as clean, then a cache line will be allocated, and we name this cache line "cache line A" and assume the          cache line size is 32bytes.
   2) 32 bytes data in the destination memory will be filled to the cache line A .
   3) 0x55aa will be written to cache line A and the cache line A will marked as "dirty"
2. If a word (0x55aa for example)is written to a memory space (address A) which is write-though and no-write-allocate and a cache miss occurred, then
   1)0x55aa is write to the main memory directly.
   2)There is no "copy" of (address A) in the cache.
   3) If the address A was read, 32 bytes data will filled into the cache. If there is not clean cache, a certain cache line will be flush to main memory and then marked as clean.

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Peter Harris over 12 years ago

Note: This was originally posted on 23rd November 2011 at http://forums.arm.com

Caches are complex, and it is mostly a game of statistics. The cache / the algorithms it uses are designed to give reliable average performance, irrespective of use case. Pseudo-random policies are generally chosen as while not as good as more specific strategies for some use cases, they avoid absolutely pathologically bad corner cases too...

So in short, as long as caches are turned on, I wouldn't worry about it. You'd be far better off working out how to avoid the copy completely, if you can ...

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Peter Harris over 12 years ago

Note: This was originally posted on 23rd November 2011 at http://forums.arm.com

Caches are complex, and it is mostly a game of statistics. The cache / the algorithms it uses are designed to give reliable average performance, irrespective of use case. Pseudo-random policies are generally chosen as while not as good as more specific strategies for some use cases, they avoid absolutely pathologically bad corner cases too...

So in short, as long as caches are turned on, I wouldn't worry about it. You'd be far better off working out how to avoid the copy completely, if you can ...

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