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Boot ROM Code for ARM Cortex A9 MP Core SoC

tushark tushark
Note: This was originally posted on 5th August 2011 at http://forums.arm.com

Hi,

I am working on ARM Cortex A9 MP Core SoC. As a part of software development, I need to understand how booting takes place in case ARM Cortex A9 considering the reset vector. I wanted to know more about the Boot ROM code which could be part of SoC. Can I get details / documentation / reference code about the Boot ROM code for ARM Cortex A9? Also I would like to know what are the steps involved in general booting sequence right from the RESET/Power ON till it loads the kernel.

Thanks & Regards,
TK
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  • Note: This was originally posted on 24th August 2011 at http://forums.arm.com

    My understanding is that some part of it is implementation defined. As your shared .pdf also reflects that secondary code jumps to the code once it is released from primary CPU. I can visualize that once released, the secondary CPUs will (after some further local initialization) enter _sec_processor_idle () where they are ready to receive job/tasks to run. You can consider this idle() as a lowest priority thread and acting as a placeholder for when there is nothing to run on that CPU.



    Hi,

    Iam using OMAP4430 panda board for my project development. As a part of  ROM code execution (in ARMCortex A9 MP Core) core-'0' will do the system  initialization, stack setup and boot the OS. core-'1' will be waiting  for SEV flag, which is SET by core-'0' booted OS. Then core-'1' will  jump to address mentioned in AUXCOREBOOT1 register.Let me know what  is the default address that core-'1' will jump and start its execution.  Kindly refer attachment to see the ROM code execution sequence.

    Regards,
    Karthi



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  • Note: This was originally posted on 24th August 2011 at http://forums.arm.com

    My understanding is that some part of it is implementation defined. As your shared .pdf also reflects that secondary code jumps to the code once it is released from primary CPU. I can visualize that once released, the secondary CPUs will (after some further local initialization) enter _sec_processor_idle () where they are ready to receive job/tasks to run. You can consider this idle() as a lowest priority thread and acting as a placeholder for when there is nothing to run on that CPU.



    Hi,

    Iam using OMAP4430 panda board for my project development. As a part of  ROM code execution (in ARMCortex A9 MP Core) core-'0' will do the system  initialization, stack setup and boot the OS. core-'1' will be waiting  for SEV flag, which is SET by core-'0' booted OS. Then core-'1' will  jump to address mentioned in AUXCOREBOOT1 register.Let me know what  is the default address that core-'1' will jump and start its execution.  Kindly refer attachment to see the ROM code execution sequence.

    Regards,
    Karthi



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