This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Cortex-A9 Cause for wake up from low power mode ( WFI )

Note: This was originally posted on 26th July 2011 at http://forums.arm.com

Hi
I am using cortex-A9 powered soc, it has two a9 cores.

when cpu1 is put in low power mode using the wfi, the processor wakes up unintentionally.
From the Cortex-A9 MPCore TRM, the causes for the wake ups are

The transition from the WFI Standby mode to the Run modeis caused by:

"¢ An interrupt, masked or unmasked.

"¢ An asynchronous data abort, regardless of the value ofthe CPSR.A bit. A pending wake-up event prevents the processor from enteringlow power mode.

"¢ A debug request, regardless of whether debug isenabled.

"¢ A cp15 maintenance request from another processor

"¢ A reset.

Since all Irq's are routed to cpu0, irq is not a cause for the spurious wakeup,
The only cause seems to be the "cp15 maintenance request from another processor"

How to check which of the CP15 maintenance request caused the wakup
is it possible to disable the cp15 maintenance requests from other cpu before going to low power mode.


Thanks
Parents
  • Note: This was originally posted on 26th July 2011 at http://forums.arm.com

    I think it means cache/tlb/btac broadcast operations.  If so, these are enabled/disable by the FW bit in the CP15 Aux Control Register.  However, I'm not sure you really want to disable this!  Cache maintenance broadcasting is part of the coherency management support provided by the A9 MPCore.  If you want a coherent system you in almost certainly want this feature enabled.

    The thing to remember with WFI and WFE is that they aren't there for synchronization.  They are are there for power saving.  So on waking from stand-0by your code should always check to see why it woke up.  Or to put it another way, whether it should go back to sleep.
Reply
  • Note: This was originally posted on 26th July 2011 at http://forums.arm.com

    I think it means cache/tlb/btac broadcast operations.  If so, these are enabled/disable by the FW bit in the CP15 Aux Control Register.  However, I'm not sure you really want to disable this!  Cache maintenance broadcasting is part of the coherency management support provided by the A9 MPCore.  If you want a coherent system you in almost certainly want this feature enabled.

    The thing to remember with WFI and WFE is that they aren't there for synchronization.  They are are there for power saving.  So on waking from stand-0by your code should always check to see why it woke up.  Or to put it another way, whether it should go back to sleep.
Children
No data