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LR Contents upon IRQ Handler in Cortex-M3
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LR Contents upon IRQ Handler in Cortex-M3
Muhammad Ahsan
over 12 years ago
Note: This was originally posted on 16th June 2011 at
http://forums.arm.com
Hi,
I am with Cortex-M3 and I have implemented a function that calcultes CRC using DMA and upon the completion of this calculation and Interrupt is generated. As soon as the program jumps to the IRQ handler, the content of LR register becomes 0xFFFFFFF9 which causes the program to get lost upon the complete execution of IRQ handler.
In order to verify, whether the LR is loaded with same 0xFFFFFFF9 in case of entering some other IRQ, I have implemented another function, in which FRT counter counts and upon overflow jumps to the corresponding IRQ handler. I have observed that the LR contents are also changed to 0xFFFFFFF9.
Is there anything that I am missing in regard to implement and handle interrupts in Cortex-M3?
Suggestions will highly be appreciated!!!
Regards,
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