Unable to create new platform configuration with zedboard for core detection using DS5, DStream without using default Xillinx configuration, Kindly guide us thanks in advance
we are connected the JTAG from J15 (zedboard) to DStream debugger
observed following errors
Hi Ratan,
If this is a Zedboard Ultra, then this uses ES2 Silicon from Xilinx and this hides the ARM DAP by default.
So you would not be able to detect the ARM DAP.
In order to support this, DS-5 v5.27 includes the special JTAG scans that enable the connection to the ARM DAP.
You do however need to use the included configuration for the Xilinx UltraSCALE MPSoC and you must use DS-5 v5.27 for this to work.
If this is an Zedboard (not an Ultra) then you should be able to connect using the 'Xilinx Zynq-7000 Cascaded' connection that is supplied with DS-5.
There should be no need to use PCE to configure a new connection.
You can use DS-5 v5.25 for the Zynq-7000 based Zedboard.
I hope this helps you.
Do please let me know how you get on.
Regards,
Stuart