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Unable to create new platform configuration with zedboard for core detection using DS5, DStream without using existing Xillinx configuration

Ratan

Unable to create new platform configuration with zedboard  for core detection using DS5, DStream without using default Xillinx configuration, Kindly guide us thanks in advance

we are connected the  JTAG from J15 (zedboard) to  DStream debugger

observed following errors

ARM DS-5 v5.25.0, build number5250010
Beginning Autodetection
--- --- ---
Counting devices:
DR Chain [1024]:
[00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011
 11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100]
Device Count: 2
Reading IDCODEs:
DR Chain [64]:
[0100101110100000000001000111011100000011011100100111000010010011]
Device 0 has IDCODE = 0x4BA00477
Device 1 has IDCODE = 0x03727093
IR Chain [1024]:
[11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
 11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111110001010001]
Device 0 has IR Length = 2
Device 1 has IR Length = 4
Autodetection failed: Measured IR length is too small
 
  • 0

    Hi Ratan, DS-5 has been unable to measure the IR length of the Xilinx device.

    In detail, to detect the devices on the JTAG scan chain, DS-5 needs to know the JTAG IR lengths for the devices on the chain. In general, measuring the IR lengths is problematic when the device does not return a 0....01 pattern (i.e. all 0s with the first two bits being 01) when reading the IR. Many devices (including ARM devices) do return such a pattern (see the 0001 pattern at the end of the IR chain), but Xilinx devices use the upper IR bits to return status information (which it is entitled to do), which makes it impossible for DS-5 to measure the IR length for this device.

    To make progress you will need to do some manual configuration of the JTAG scan chain within PCE - to add the ARM DAP and Xilinx (IR length=6) devices. You must then select the ARM DAP device and get PCE to read its ROM table and configure from there. Once you have the JTAG devices in the chain, right click the ARM DAP and choose 'Enumerate APs', then right click the discovered APs and choose 'Read ROM Table'.

    See if this gets you further.

  • 0

    Hi Ratan,

    If this is a  Zedboard Ultra, then this uses ES2 Silicon from Xilinx and this hides the ARM DAP by default.

    So you would not be able to detect the ARM DAP.

    In order to support this, DS-5 v5.27 includes the special JTAG scans that enable the connection to the ARM DAP.

    You do however need to use the included configuration for the Xilinx UltraSCALE MPSoC and you must use DS-5 v5.27 for this to work.

    If this is an  Zedboard  (not an Ultra) then you should be able to connect using the 'Xilinx Zynq-7000 Cascaded' connection that is supplied with DS-5.

    There should be no need to use PCE to configure a new connection.

    You can use DS-5 v5.25 for the Zynq-7000 based Zedboard.

    I hope this helps you.

    Do please let me know how you get on.

    Regards,

    Stuart