Unable to create new platform configuration with zedboard for core detection using DS5, DStream without using default Xillinx configuration, Kindly guide us thanks in advance
we are connected the JTAG from J15 (zedboard) to DStream debugger
observed following errors
Hi Ratan, DS-5 has been unable to measure the IR length of the Xilinx device. In detail, to detect the devices on the JTAG scan chain, DS-5 needs to know the JTAG IR lengths for the devices on the chain. In general, measuring the IR lengths is problematic when the device does not return a 0....01 pattern (i.e. all 0s with the first two bits being 01) when reading the IR. Many devices (including ARM devices) do return such a pattern (see the 0001 pattern at the end of the IR chain), but Xilinx devices use the upper IR bits to return status information (which it is entitled to do), which makes it impossible for DS-5 to measure the IR length for this device. To make progress you will need to do some manual configuration of the JTAG scan chain within PCE - to add the ARM DAP and Xilinx (IR length=6) devices. You must then select the ARM DAP device and get PCE to read its ROM table and configure from there. Once you have the JTAG devices in the chain, right click the ARM DAP and choose 'Enumerate APs', then right click the discovered APs and choose 'Read ROM Table'. See if this gets you further.