Arm Development Studio forum ARM926ejs MMU problem

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ARM926ejs MMU problem

Note: This was originally posted on 17th December 2010 at http://forums.arm.com

I am working on an ARM926ejs core (Fiujitsu) with Linux as the OS.

I am trying to disable the MMU and re enable it again. I read lot of articles on the net and tried to follow the same procedure:
1. Invalidate D-cache (and I-cache)
2. Invalidated TLB
3. Disable MMU

however, I observed that as soon as I turned OFF the MMU the system got stuck, but if I run the same code without disabling the MMU, it works fine.
I want to know what exactly is going wrong after the MMU is disabled?

Following is the code snipped I used to disable the MMU:
     /* The Instruction and Data Cache are disabled:: code not pasted here */

     mov   r0,#0

     /* Invalidate TLB */
     mcr p15, 0, r0, c8, c7, 0

#if 1
     nop
     mcr p15, 0, r2, c1, c0, 0   /* Disable MMU */
     mov r2,r2                /* these could be in pipeline with MVA */
     mov r2,r2                /* these could be in pipeline with MVA */
     mov r2,r2                /* these could be in pipeline with MVA */
     mov pc,r10               /* jump to Enable MMU: this could be the actual PA to jump */
#endif

I tried to disable the "Instruction Prefetch" in the co-processor c15 register. I've been struggling to get this to work for the past one month and unable to get the desired outcome.
If there's anyone who could help me solve this, I would greatly appreciate.