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NEW on Cortex-M3 STM32F103B IAR

slim bahri
Note: This was originally posted on 29th January 2010 at http://forums.arm.com

Hi everyone,

I recently got an Arm cortex m3 microcontroller (stm32f103B). I'm interested in programming in C. I received some software with the kit I bought (IAR workbench kickstart) but i find all of these a little confusing to use. Reading the book "the definitive guide to arm cortex m3",
i found that's describing assembly instructions,

I ask, if there is an other guide wich describes C instructions?
Parents
  • Arm Employee Badge
    Note: This was originally posted on 6th April 2010 at http://forums.arm.com

    Context switching is not done by NVIC.  NVIC provide the exception mechanism for the software but the context switching is done by software.

    For example,
    - Task A running, and a SysTick timer tick trigger.
    - Register R0-R3, R12, LR, PC and xPSR are saved onto stacked with PSP
    - OS kernel determine that context switching is needed and set the PendSV exception pending status
    - Systick exception exit
    - PendSV get execute if no other exception is running
    - PendSV handler save the remaining registers (R4-R11), and current PSP value to a data structure for Task A.
    - PendSV handle load the register R4-R11, and PSP values from another data structure for Task B.
    - PendSV carry out exception return
    - The stack frame for task B is used for unstacking, and continue running task B.

    I don't have actual code to show you (I don't want to spend lots of time to prepare such example while you can try reading the source code or some open source OS). Even if I produce such example it might not match up what you see in the OS you are using.
Reply
  • Arm Employee Badge
    Note: This was originally posted on 6th April 2010 at http://forums.arm.com

    Context switching is not done by NVIC.  NVIC provide the exception mechanism for the software but the context switching is done by software.

    For example,
    - Task A running, and a SysTick timer tick trigger.
    - Register R0-R3, R12, LR, PC and xPSR are saved onto stacked with PSP
    - OS kernel determine that context switching is needed and set the PendSV exception pending status
    - Systick exception exit
    - PendSV get execute if no other exception is running
    - PendSV handler save the remaining registers (R4-R11), and current PSP value to a data structure for Task A.
    - PendSV handle load the register R4-R11, and PSP values from another data structure for Task B.
    - PendSV carry out exception return
    - The stack frame for task B is used for unstacking, and continue running task B.

    I don't have actual code to show you (I don't want to spend lots of time to prepare such example while you can try reading the source code or some open source OS). Even if I produce such example it might not match up what you see in the OS you are using.
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