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memory barrier

Note: This was originally posted on 18th January 2010 at http://forums.arm.com

Hi,

On x86/win architecture there is a function called MemoryBarrier that prevents the CPU from re-ordering read/write operations.
Is there something like that on arm architecture ?

// x86

FORCEINLINE VOID
MemoryBarrier (VOID)
{
    LONG Barrier;
    __asm {
        xchg Barrier, eax
    }
}

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guestposter guestposter over 12 years ago

Note: This was originally posted on 19th January 2010 at http://forums.arm.com

Older generations of ARM processors (e.g. ARM7TDMI) does not have memory barrier instructions.
Newer ARM processors (all Cortex-A, Cortex-R and Cortex-M processors) have memory barrier instructions:
http://www.keil.com/support/man/docs/armasm/
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guestposter guestposter over 12 years ago

Note: This was originally posted on 19th January 2010 at http://forums.arm.com

Older generations of ARM processors (e.g. ARM7TDMI) does not have memory barrier instructions.
Newer ARM processors (all Cortex-A, Cortex-R and Cortex-M processors) have memory barrier instructions:
http://www.keil.com/support/man/docs/armasm/
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