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can't read CPSR correctly

arnina over 12 years ago

Note: This was originally posted on 15th October 2009 at http://forums.arm.com

hello,
I write the following codes to determine the mode in which the processor(Xscale) operates:

int x;
    asm volatile ("mrs %0, cpsr"
            :"=r"(x)
        );
    printf("cpsr:%x\n", x);

however, the result is:
cpsr:20000013

it doesn't seem to mean any mode, so what's going on?

arnina over 12 years ago

Note: This was originally posted on 21st October 2009 at http://forums.arm.com

thks.By the way, I've done another test after that, and I find the difference between CPSR and SPSR:

cpsr:60000013, spsr:600000d3

It means SPSR with IRQ and FIQ disabled.
In which circumstance will it happen?
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Simon Craske over 12 years ago

Note: This was originally posted on 19th October 2009 at http://forums.arm.com

The most significant bits[31:28] are the flags, b0010 giving N clear, Z clear, C set and V clear.
The least significant bits[4:0] are the mode, b10011 giving Supervisor (SVC) mode.

hth
s.
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Bhaveet Shah over 12 years ago

Note: This was originally posted on 16th October 2009 at http://forums.arm.com

hello,
I write the following codes to determine the mode in which the processor(Xscale) operates:

however, the result is:
cpsr:20000013

it doesn't seem to mean any mode, so what's going on?

Sure it does... only the bottom 5 bits are the processor mode. Looking at: [url="http://infocenter.arm.com/help/topic/com.arm.doc.dui0204i/Chdddhea.html"]http://infocenter.arm.com/help/topic/com.a...i/Chdddhea.html[/url] the mode described by the above is 0b10011, which is supervisor.
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can&#39;t read CPSR correctly

can't read CPSR correctly