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CPU1 state after boot monitor?

Note: This was originally posted on 13th October 2009 at http://forums.arm.com

Hello Experts,

There are two Cores in ARM PBX-A9 develop board: cpu0 and cpu1. Does anyone know the state of cpu1 while boot monitor is running.

Below are the boot info:

ARM PBX Boot Monitor
Version:    V4.1.7
Build Date: Feb 17 2009
Tile Site 1: Cortex A9 with 2 cores
Tile Site 2: Tile Not Fitted
Endian:     Little

I just suspect that if cpu1 is waiting the non-zero value for SYS_FLAGS(address is 0x10000030) register and then jump into that value. However, if I wrote a valid routines address in SYS_FLAGS register, it's not performed by cpu1.

Thanks much for any of your response!
  • Note: This was originally posted on 14th October 2009 at http://forums.arm.com

    Hi,

    Thanks for your response!

    I tried to send a software interrupt from CPU0 to CPU1, but got the following inexhaustible info:

    Fatal Error: Unhandled Exception - FIQ
    Fatal Error: Unhandled Exception - FIQ
    ....


    It looks that the interrupt is not acknowledged by CPU1. I know for interrupt controller module, there are some "Cortex-A9 processor interface register" which should be configured. According to ARM's manual, "Each Cortex-A9 processor interface has 256 bytes of address space allocated to it", the base address for CPU0 is 0x1f000100, and 0x1f0001fc is the "Processor Interface Implementer Identification Register", the value of this register should be 0x3901043b.

    I read the 0x1f0001fc, and got the value 0x3901043b(this is the flag for CPU0). But I got zero value from 0x1f0002fc(=0x1f0001fc+0x100), why there is no indentification info for CPU1? Is there something wrong?

    Thanks and Regards.
  • Note: This was originally posted on 14th October 2009 at http://forums.arm.com

    It turned out that the CPU1's "Pending clear registers" need be cleared if CPU0 want to send a software interrupt to wake up CPU1. But my questions about "Processor Interface Implementer Identification Register" still exist.
  • Note: This was originally posted on 14th October 2009 at http://forums.arm.com

    I think you have to send an interrupt to CPU1 to wake it.  It should then run code to read the register.