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Cortex M1, Cortex R4 - comparison

Note: This was originally posted on 25th September 2009 at http://forums.arm.com

Hi all,

Iam studyng the features supported by Cortex M1 and Cortex R4 soft processors. I have created a table for this and there are some features which i could not find.... it would be helpful if you guys can fill the missing features

Parents

guestposter guestposter over 12 years ago

Features

1. Primary FPGA Target
Cortex-M1 deliverables supports Altera, Actel, Xilinx FPGA (for licensed customers).
Current available FPGA kits include Altera version and Actel version.

Cortex-R4 does not have FPGA kit as a product, but ARM customers can get FPGA prototype platform for Cortex-R4.

2. Max Core Frequency

Cortex-M1 : It depends : What FPGA?
You can get even higher speed if you are using newer Stratrix / Virtex devices.

Cortex-R4 : It is not optimized for FPGA. For ASIC version you can get it to 600MHz with hardened version (Cortex-R4X)

3. FPGA Logic Cells

Cortex-M1:This depends on RTL options, it shown as 2600 Logic elements in Altera website

4. Hardware Multipliers
Cortex-M1 : Yes
Cortex-R4 : Yes

5. Hardware Dividers
Cortex-M1 : No
Cortex-R4 : Yes

6. Instruction Cache Size
Cortex-M1 : No cache, TCM only (up to 1MB).
Cortex-R4 : Depends on configuration, TCM also depends on configuration

7. Data Cache Size
Cortex-M1 : No cache, TCM only (up to 1MB)
Cortex-R4 : Depends on configuration, TCM also depends on configuration

8. Number of ports for Instruction TCM / TCM-A (for Cortex R4)
64-bit TCM interface

9. Number of ports for Data TCM / TCM-B (for Cortex R4)
2 x 64-bit TCM interface

10. Burst Size Setting for Cache
Cortex-R4 : Programmable by CP15

11. Exception Checking (Divsion error)
Cortex-R4 : Yes

12. MPU present/absent
Cortex-M1 : No
Cortex-R4 : Yes

13. MMU present/absent
Cortex-M1 : No
Cortex-R4 : No

14. Maximum number of Interrupts supported
Cortex-M1 : 32
Cortex-R4 : Depends on interrupt controller

15. Options to select JTAG debug level - present/absent
Cortex-M1 : Depends on which FPGA development you are using (e.g. with SOPC builder debug is carried out via the USB blaster connection)
Cortex-R4 : Depends on which debug port component you connected it to.

16. Option to set Custom instructions - present/absent
Cortex-M1 : No
Cortex-R4 : No

17. Option to Set memory for Exception Vector - present/absent
Cortex-M1 :Vector table at address 0x0 (can be AHB or TCM)
Cortex-R4 : Vector table at address 0x0 or VIC interface

18. Is a separate FPGA kit (evaluation version) available for Cyclone III FPGA
Cortex-M1 only : FPGA kit available (not sure about evaluation)

19. If Yes, does the kit consist of:
Cortex-M1 only
     Soft Core : Yes
     Software development environment : Yes
     Simulation support (for full version) : You need to get ask distributor about this

20. Tool for Software development
Cortex-M1 kit include ARM RealView Microcontroller Development Kit

21. AMBA Bus Support - present/absent
Cortex-M1 for Actel use AMBA
Cortex-M1 for Altera use Avalon
Cortex-R4 use AMBA (AXI)
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guestposter guestposter over 12 years ago

Features

1. Primary FPGA Target
Cortex-M1 deliverables supports Altera, Actel, Xilinx FPGA (for licensed customers).
Current available FPGA kits include Altera version and Actel version.

Cortex-R4 does not have FPGA kit as a product, but ARM customers can get FPGA prototype platform for Cortex-R4.

2. Max Core Frequency

Cortex-M1 : It depends : What FPGA?
You can get even higher speed if you are using newer Stratrix / Virtex devices.

Cortex-R4 : It is not optimized for FPGA. For ASIC version you can get it to 600MHz with hardened version (Cortex-R4X)

3. FPGA Logic Cells

Cortex-M1:This depends on RTL options, it shown as 2600 Logic elements in Altera website

4. Hardware Multipliers
Cortex-M1 : Yes
Cortex-R4 : Yes

5. Hardware Dividers
Cortex-M1 : No
Cortex-R4 : Yes

6. Instruction Cache Size
Cortex-M1 : No cache, TCM only (up to 1MB).
Cortex-R4 : Depends on configuration, TCM also depends on configuration

7. Data Cache Size
Cortex-M1 : No cache, TCM only (up to 1MB)
Cortex-R4 : Depends on configuration, TCM also depends on configuration

8. Number of ports for Instruction TCM / TCM-A (for Cortex R4)
64-bit TCM interface

9. Number of ports for Data TCM / TCM-B (for Cortex R4)
2 x 64-bit TCM interface

10. Burst Size Setting for Cache
Cortex-R4 : Programmable by CP15

11. Exception Checking (Divsion error)
Cortex-R4 : Yes

12. MPU present/absent
Cortex-M1 : No
Cortex-R4 : Yes

13. MMU present/absent
Cortex-M1 : No
Cortex-R4 : No

14. Maximum number of Interrupts supported
Cortex-M1 : 32
Cortex-R4 : Depends on interrupt controller

15. Options to select JTAG debug level - present/absent
Cortex-M1 : Depends on which FPGA development you are using (e.g. with SOPC builder debug is carried out via the USB blaster connection)
Cortex-R4 : Depends on which debug port component you connected it to.

16. Option to set Custom instructions - present/absent
Cortex-M1 : No
Cortex-R4 : No

17. Option to Set memory for Exception Vector - present/absent
Cortex-M1 :Vector table at address 0x0 (can be AHB or TCM)
Cortex-R4 : Vector table at address 0x0 or VIC interface

18. Is a separate FPGA kit (evaluation version) available for Cyclone III FPGA
Cortex-M1 only : FPGA kit available (not sure about evaluation)

19. If Yes, does the kit consist of:
Cortex-M1 only
     Soft Core : Yes
     Software development environment : Yes
     Simulation support (for full version) : You need to get ask distributor about this

20. Tool for Software development
Cortex-M1 kit include ARM RealView Microcontroller Development Kit

21. AMBA Bus Support - present/absent
Cortex-M1 for Actel use AMBA
Cortex-M1 for Altera use Avalon
Cortex-R4 use AMBA (AXI)
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